Bug#531488: Kernel panic booting Oracle Linux in kvm
Finally I've find out. The problem is kvm source of package
linux-source-2.6.26 does not include the kvm-66-fix-k7-msr2.patch.
kvm source in package kvm-source 72+dfsg-5 seems to be more up to date;
it includes the k7 patch and more, it seems. Look diffs in the
attachment.
I do not know if this is an error on is intended to be this way.
Anyway, rebuilding kvm modules from source packages solve the problem.
Now long term support kernel 2.6.18 boots fine.
mud@fujiko:/tmp$ dpkg -l linux-source* kvm*
Desired=Unknown/Install/Remove/Purge/Hold
| Status=Not/Inst/Cfg-files/Unpacked/Failed-cfg/Half-inst/trig-aWait/Trig-pend
|/ Err?=(none)/Hold/Reinst-required/X=both-problems (Status,Err: uppercase=bad)
||/ Name Version Description
+++-=================================-=================================-==================================================================================
ii kvm 72+dfsg-5 Full virtualization on x86 hardware
un kvm-data <none> (no description available)
un kvm-modules <none> (no description available)
ii kvm-modules-2.6.26-1-amd64 72+dfsg-3+2.6.26-11 kvm modules for Linux (kernel 2.6.26-1-amd64).
ii kvm-modules-2.6.26-2-amd64 72+dfsg-5+2.6.26-15 kvm modules for Linux (kernel 2.6.26-2-amd64).
ii kvm-source 72+dfsg-5 Source for the KVM driver
un linux-source <none> (no description available)
un linux-source-2.6 <none> (no description available)
pn linux-source-2.6.22 <none> (no description available)
ii linux-source-2.6.26 2.6.26-15 Linux kernel source for version 2.6.26 with Debian patches
mud@fujiko:/tmp$ tar -xjf /usr/src/linux-source-2.6.26.tar.bz2
mud@fujiko:/tmp$ tar -xjf /usr/src/kvm.tar.bz2
mud@fujiko:/tmp$ diff linux-source-2.6.26/arch/x86/kvm/svm.c modules/kvm/svm.c
20a21
> #include "kvm_cache_regs.h"
29a31,33
> #define __ex(x) __kvm_handle_fault_on_reboot(x)
>
> MODULE_INFO(version, "kvm-72");
36,39d39
< #define DB_VECTOR 1
< #define UD_VECTOR 6
< #define GP_VECTOR 13
<
63d62
< static void svm_flush_tlb(struct kvm_vcpu *vcpu);
133c132
< asm volatile (SVM_CLGI);
---
> asm volatile (__ex(SVM_CLGI));
138c137
< asm volatile (SVM_STGI);
---
> asm volatile (__ex(SVM_STGI));
143c142
< asm volatile (SVM_INVLPGA :: "a"(addr), "c"(asid));
---
> asm volatile (__ex(SVM_INVLPGA) :: "a"(addr), "c"(asid));
237,241c236,238
< if (svm->next_rip - svm->vmcb->save.rip > MAX_INST_SIZE)
< printk(KERN_ERR "%s: ip 0x%llx next 0x%llx\n",
< __func__,
< svm->vmcb->save.rip,
< svm->next_rip);
---
> if (svm->next_rip - kvm_rip_read(vcpu) > MAX_INST_SIZE)
> printk(KERN_ERR "%s: ip 0x%lx next 0x%llx\n",
> __func__, kvm_rip_read(vcpu), svm->next_rip);
243c240
< vcpu->arch.rip = svm->vmcb->save.rip = svm->next_rip;
---
> kvm_rip_write(vcpu, svm->next_rip);
286,287c283,284
< struct desc_ptr gdt_descr;
< struct desc_struct *gdt;
---
> struct kvm_desc_ptr gdt_descr;
> struct kvm_desc_struct *gdt;
307c304
< gdt = (struct desc_struct *)gdt_descr.address;
---
> gdt = (struct kvm_desc_struct *)gdt_descr.address;
455c452,453
< }
---
> } else
> kvm_disable_tdp();
580a579
> svm->vcpu.arch.regs[VCPU_REGS_RIP] = save->rip;
615c614
< svm->vmcb->save.rip = 0;
---
> kvm_rip_write(vcpu, 0);
618a618,619
> vcpu->arch.regs_avail = ~0;
> vcpu->arch.regs_dirty = ~0;
721,741d721
< static void svm_vcpu_decache(struct kvm_vcpu *vcpu)
< {
< }
<
< static void svm_cache_regs(struct kvm_vcpu *vcpu)
< {
< struct vcpu_svm *svm = to_svm(vcpu);
<
< vcpu->arch.regs[VCPU_REGS_RAX] = svm->vmcb->save.rax;
< vcpu->arch.regs[VCPU_REGS_RSP] = svm->vmcb->save.rsp;
< vcpu->arch.rip = svm->vmcb->save.rip;
< }
<
< static void svm_decache_regs(struct kvm_vcpu *vcpu)
< {
< struct vcpu_svm *svm = to_svm(vcpu);
< svm->vmcb->save.rax = vcpu->arch.regs[VCPU_REGS_RAX];
< svm->vmcb->save.rsp = vcpu->arch.regs[VCPU_REGS_RSP];
< svm->vmcb->save.rip = vcpu->arch.rip;
< }
<
883,886d862
< unsigned long old_cr4 = to_svm(vcpu)->vmcb->save.cr4;
<
< if (npt_enabled && ((old_cr4 ^ cr4) & X86_CR4_PGE))
< force_new_asid(vcpu);
967c943,945
< return to_svm(vcpu)->db_regs[dr];
---
> unsigned long val = to_svm(vcpu)->db_regs[dr];
> KVMTRACE_2D(DR_READ, vcpu, (u32)dr, (u32)val, handler);
> return val;
1026,1032c1004,1011
< /*
< * FIXME: Tis shouldn't be necessary here, but there is a flush
< * missing in the MMU code. Until we find this bug, flush the
< * complete TLB here on an NPF
< */
< if (npt_enabled)
< svm_flush_tlb(&svm->vcpu);
---
> if (!npt_enabled)
> KVMTRACE_3D(PAGE_FAULT, &svm->vcpu, error_code,
> (u32)fault_address, (u32)(fault_address >> 32),
> handler);
> else
> KVMTRACE_3D(TDP_FAULT, &svm->vcpu, error_code,
> (u32)fault_address, (u32)(fault_address >> 32),
> handler);
1112a1092,1104
> static int nmi_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
> {
> KVMTRACE_0D(NMI, &svm->vcpu, handler);
> return 1;
> }
>
> static int intr_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
> {
> ++svm->vcpu.stat.irq_exits;
> KVMTRACE_0D(INTR, &svm->vcpu, handler);
> return 1;
> }
>
1120c1112
< svm->next_rip = svm->vmcb->save.rip + 1;
---
> svm->next_rip = kvm_rip_read(&svm->vcpu) + 1;
1127c1119
< svm->next_rip = svm->vmcb->save.rip + 3;
---
> svm->next_rip = kvm_rip_read(&svm->vcpu) + 3;
1159c1151
< svm->next_rip = svm->vmcb->save.rip + 2;
---
> svm->next_rip = kvm_rip_read(&svm->vcpu) + 2;
1251c1243,1246
< svm->vmcb->save.rax = data & 0xffffffff;
---
> KVMTRACE_3D(MSR_READ, &svm->vcpu, ecx, (u32)data,
> (u32)(data >> 32), handler);
>
> svm->vcpu.arch.regs[VCPU_REGS_RAX] = data & 0xffffffff;
1253c1248
< svm->next_rip = svm->vmcb->save.rip + 2;
---
> svm->next_rip = kvm_rip_read(&svm->vcpu) + 2;
1315a1311,1314
> case MSR_K7_PERFCTR0:
> case MSR_K7_PERFCTR1:
> case MSR_K7_PERFCTR2:
> case MSR_K7_PERFCTR3:
1317,1319c1316,1318
< * only support writing 0 to the performance counters for now
< * to make Windows happy. Should be replaced by a real
< * performance counter emulation later.
---
> * Just discard all writes to the performance counters; this
> * should keep both older linux and windows 64-bit guests
> * happy
1321,1322c1320,1321
< if (data != 0)
< goto unhandled;
---
> pr_unimpl(vcpu, "unimplemented perfctr wrmsr: 0x%x data 0x%llx\n", ecx, data);
>
1325d1323
< unhandled:
1334c1332
< u64 data = (svm->vmcb->save.rax & -1u)
---
> u64 data = (svm->vcpu.arch.regs[VCPU_REGS_RAX] & -1u)
1336c1334,1338
< svm->next_rip = svm->vmcb->save.rip + 2;
---
>
> KVMTRACE_3D(MSR_WRITE, &svm->vcpu, ecx, (u32)data, (u32)(data >> 32),
> handler);
>
> svm->next_rip = kvm_rip_read(&svm->vcpu) + 2;
1354a1357,1358
> KVMTRACE_0D(PEND_INTR, &svm->vcpu, handler);
>
1396,1397c1400,1401
< [SVM_EXIT_INTR] = nop_on_interception,
< [SVM_EXIT_NMI] = nop_on_interception,
---
> [SVM_EXIT_INTR] = intr_interception,
> [SVM_EXIT_NMI] = nmi_interception,
1428a1433,1435
> KVMTRACE_3D(VMEXIT, vcpu, exit_code, (u32)svm->vmcb->save.rip,
> (u32)((u64)svm->vmcb->save.rip >> 32), entryexit);
>
1501a1509,1510
> KVMTRACE_1D(INJ_VIRQ, &svm->vcpu, (u32)irq, handler);
>
1679a1689,1694
> #ifdef CONFIG_X86_64
> #define R "r"
> #else
> #define R "e"
> #endif
>
1686a1702,1705
> svm->vmcb->save.rax = vcpu->arch.regs[VCPU_REGS_RAX];
> svm->vmcb->save.rsp = vcpu->arch.regs[VCPU_REGS_RSP];
> svm->vmcb->save.rip = vcpu->arch.regs[VCPU_REGS_RIP];
>
1692,1694c1711,1713
< fs_selector = read_fs();
< gs_selector = read_gs();
< ldt_selector = read_ldt();
---
> fs_selector = kvm_read_fs();
> gs_selector = kvm_read_gs();
> ldt_selector = kvm_read_ldt();
1713a1733,1739
> "push %%"R"bp; \n\t"
> "mov %c[rbx](%[svm]), %%"R"bx \n\t"
> "mov %c[rcx](%[svm]), %%"R"cx \n\t"
> "mov %c[rdx](%[svm]), %%"R"dx \n\t"
> "mov %c[rsi](%[svm]), %%"R"si \n\t"
> "mov %c[rdi](%[svm]), %%"R"di \n\t"
> "mov %c[rbp](%[svm]), %%"R"bp \n\t"
1715,1726d1740
< "push %%rbp; \n\t"
< #else
< "push %%ebp; \n\t"
< #endif
<
< #ifdef CONFIG_X86_64
< "mov %c[rbx](%[svm]), %%rbx \n\t"
< "mov %c[rcx](%[svm]), %%rcx \n\t"
< "mov %c[rdx](%[svm]), %%rdx \n\t"
< "mov %c[rsi](%[svm]), %%rsi \n\t"
< "mov %c[rdi](%[svm]), %%rdi \n\t"
< "mov %c[rbp](%[svm]), %%rbp \n\t"
1735,1741d1748
< #else
< "mov %c[rbx](%[svm]), %%ebx \n\t"
< "mov %c[rcx](%[svm]), %%ecx \n\t"
< "mov %c[rdx](%[svm]), %%edx \n\t"
< "mov %c[rsi](%[svm]), %%esi \n\t"
< "mov %c[rdi](%[svm]), %%edi \n\t"
< "mov %c[rbp](%[svm]), %%ebp \n\t"
1744,1752d1750
< #ifdef CONFIG_X86_64
< /* Enter guest mode */
< "push %%rax \n\t"
< "mov %c[vmcb](%[svm]), %%rax \n\t"
< SVM_VMLOAD "\n\t"
< SVM_VMRUN "\n\t"
< SVM_VMSAVE "\n\t"
< "pop %%rax \n\t"
< #else
1754,1760c1752,1757
< "push %%eax \n\t"
< "mov %c[vmcb](%[svm]), %%eax \n\t"
< SVM_VMLOAD "\n\t"
< SVM_VMRUN "\n\t"
< SVM_VMSAVE "\n\t"
< "pop %%eax \n\t"
< #endif
---
> "push %%"R"ax \n\t"
> "mov %c[vmcb](%[svm]), %%"R"ax \n\t"
> __ex(SVM_VMLOAD) "\n\t"
> __ex(SVM_VMRUN) "\n\t"
> __ex(SVM_VMSAVE) "\n\t"
> "pop %%"R"ax \n\t"
1762a1760,1765
> "mov %%"R"bx, %c[rbx](%[svm]) \n\t"
> "mov %%"R"cx, %c[rcx](%[svm]) \n\t"
> "mov %%"R"dx, %c[rdx](%[svm]) \n\t"
> "mov %%"R"si, %c[rsi](%[svm]) \n\t"
> "mov %%"R"di, %c[rdi](%[svm]) \n\t"
> "mov %%"R"bp, %c[rbp](%[svm]) \n\t"
1764,1769d1766
< "mov %%rbx, %c[rbx](%[svm]) \n\t"
< "mov %%rcx, %c[rcx](%[svm]) \n\t"
< "mov %%rdx, %c[rdx](%[svm]) \n\t"
< "mov %%rsi, %c[rsi](%[svm]) \n\t"
< "mov %%rdi, %c[rdi](%[svm]) \n\t"
< "mov %%rbp, %c[rbp](%[svm]) \n\t"
1778,1788d1774
<
< "pop %%rbp; \n\t"
< #else
< "mov %%ebx, %c[rbx](%[svm]) \n\t"
< "mov %%ecx, %c[rcx](%[svm]) \n\t"
< "mov %%edx, %c[rdx](%[svm]) \n\t"
< "mov %%esi, %c[rsi](%[svm]) \n\t"
< "mov %%edi, %c[rdi](%[svm]) \n\t"
< "mov %%ebp, %c[rbp](%[svm]) \n\t"
<
< "pop %%ebp; \n\t"
1789a1776
> "pop %%"R"bp"
1809a1797
> , R"bx", R"cx", R"dx", R"si", R"di"
1811d1798
< , "rbx", "rcx", "rdx", "rsi", "rdi"
1813,1814d1799
< #else
< , "ebx", "ecx", "edx" , "esi", "edi"
1821a1807,1809
> vcpu->arch.regs[VCPU_REGS_RAX] = svm->vmcb->save.rax;
> vcpu->arch.regs[VCPU_REGS_RSP] = svm->vmcb->save.rsp;
> vcpu->arch.regs[VCPU_REGS_RIP] = svm->vmcb->save.rip;
1827,1829c1815,1817
< load_fs(fs_selector);
< load_gs(gs_selector);
< load_ldt(ldt_selector);
---
> kvm_load_fs(fs_selector);
> kvm_load_gs(gs_selector);
> kvm_load_ldt(ldt_selector);
1842a1831,1832
> #undef R
>
1921d1910
< .vcpu_decache = svm_vcpu_decache,
1942,1943d1930
< .cache_regs = svm_cache_regs,
< .decache_regs = svm_decache_regs,
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