Re: atlas3 on hppa: unexpected reloc type
On Mon, Jun 14, 2004 at 04:03:21PM -0400, Camm Maguire wrote:
> OK, I got access to an hp 9000/800, whatever the hell that means. Because I
Unfortunately, it only means "PA-RISC server".
> find the whole platform completely confusing (how do the CPU types map to
> the model names, and how do these relate to the PA-RISC numbers, and
> are all cpus of a given PA-RISC level basically the same chip with differing
> clock speeds and cache sizes?), I was unable to add good config support,
OK, let's try to explain it. yes, it's complicated, for all kinds of
reasons. Starting out with the most recent processors:
PA8800 } These are all 64-bit processors that implement the PA 2.0
PA8700 } specification. They're basically similar processors with minor
PA8600 } improvements in implementation as well as cache improvements and
PA8500 } process shrinks.
PA8200 }
PA8000 }
PA7300LC (PCX-L2) - The last 32-bit processor. Has a bunch of features found
in the PA2.0 specification, but not all of them. Highly integrated
like the 7100LC. No SMP.
PA7200 (PCX-T') - 32-bit processor that uses the same Runway bus as the PA2.0
processors. SMP-capable.
PA7100LC (PCX-L) - Integrates the memory controller onto the CPU. No SMP
capability.
PA7100 (PCX-T) - I can't think of anything interesting to say about this one.
PA7000 (PCX-S) - Takes a trap if you LDCW to an address that's not 16-byte
aligned.
PA7000 (PA1.0) - Don't care about these ancient CPUs.
Machine model names are hard to map to CPU numbers. Basically, I "just know".
Copying from the kernel Kconfig files where I wrote this information down:
bool "PA7100LC"
help
Select this option for the PCX-L processor, as used in the
712, 715/64, 715/80, 715/100, 715/100XC, 725/100, 743, 748,
D200, D210, D300, D310 and E-class
bool "PA7200"
help
Select this option for the PCX-T' processor, as used in the
C100, C110, J100, J110, J210XC, D250, D260, D350, D360,
K100, K200, K210, K220, K400, K410 and K420
bool "PA7300LC"
help
Select this option for the PCX-L2 processor, as used in the
744, A180, B132L, B160L, B180L, C132L, C160L, C180L,
D220, D230, D320 and D330.
You can glean more information from http://hwdb.parisc-linux.org/ or
www.cpus.hp.com which seems to be down ;-(
> >From reading, it appears that PA-RISC 2.0 has prefetch, but 1.1 did not.
> Here's an appropriate cut of atlas_prefetch.h:
>
> #elif defined(ATL_PARISC2) && defined(__GNUC__)
> #define ATL_pfl1R(mem) \
> __asm__ __volatile__ ("ldw %0, %%r0" : : "m" (*((char *)(mem))))
> #define ATL_pfl1W(mem) \
> __asm__ __volatile__ ("ldd %0, %%r0" : : "m" (*((char *)(mem))))
> #elif defined(ATL_AltiVec)
Looks good.
--
"Next the statesmen will invent cheap lies, putting the blame upon
the nation that is attacked, and every man will be glad of those
conscience-soothing falsities, and will diligently study them, and refuse
to examine any refutations of them; and thus he will by and by convince
himself that the war is just, and will thank God for the better sleep
he enjoys after this process of grotesque self-deception." -- Mark Twain
Reply to: