Re: Atomic instructions
On Tuesday 20 Aug 2002 2:05 am, Randolph Chung wrote:
> ldcw is really the only atomic operation on pa. In the kernel cmpxchg is
> implemented as a multi-instruction operation done inside a lock (that's
> done using ldcw)
Yes, I had seen that but it seems to be not promising.
> is using an external lock an option?
Not at first glance. The reason I ask is the SableVM Java VM. The only
requirement it makes of an architecture is that it can implement the
"compare_and_swap" routine. Unfortunately this is implemented as a single
function, so it would seem necessary to lock the whole VM while performing
the op, which is probably going to kill performance.
I will have to investigate further.
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