r6012 - in glibc-package/branches/eglibc-2.19/debian: . patches patches/powerpc
Author: adconrad
Date: 2014-04-09 22:09:31 +0000 (Wed, 09 Apr 2014)
New Revision: 6012
Added:
glibc-package/branches/eglibc-2.19/debian/patches/powerpc/cvs-ibm-branch.diff
Removed:
glibc-package/branches/eglibc-2.19/debian/patches/powerpc/cvs-bzero-static-ppc32.diff
glibc-package/branches/eglibc-2.19/debian/patches/powerpc/cvs-bzero-static-ppc64.diff
Modified:
glibc-package/branches/eglibc-2.19/debian/changelog
glibc-package/branches/eglibc-2.19/debian/patches/series
Log:
debian/patches/powerpc/cvs-ibm-branch.diff: Pull in IBM's 2.19 backports
to fix several bugs and add optimisations on POWER7 and POWER8 machines.
Modified: glibc-package/branches/eglibc-2.19/debian/changelog
===================================================================
--- glibc-package/branches/eglibc-2.19/debian/changelog 2014-04-04 23:00:20 UTC (rev 6011)
+++ glibc-package/branches/eglibc-2.19/debian/changelog 2014-04-09 22:09:31 UTC (rev 6012)
@@ -44,9 +44,8 @@
* debian/sysdeps/arm64.mk: Enable IFUNC, now that binutils can support it.
* debian/patches/locale/submitted-XDR-revert.diff: Return the XDR currency
to locale/iso-4217.def because localedata/locales/i18n needs to have it.
- * debian/patches/powerpc/cvs-bzero-static-ppc64.diff: Fixes an issue where
- __bzero/bzero are defined incorrectly when doing static builds on ppc64.
- * debian/patches/powerpc/cvs-bzero-static-ppc32.diff: 32-bit fix for same.
+ * debian/patches/powerpc/cvs-ibm-branch.diff: Pull in IBM's 2.19 backports
+ to fix several bugs and add optimisations on POWER7 and POWER8 machines.
[ Aurelien Jarno ]
* debian/debhelper.in/libc.preinst: remove check for sparc32 kernel, the
Deleted: glibc-package/branches/eglibc-2.19/debian/patches/powerpc/cvs-bzero-static-ppc32.diff
===================================================================
--- glibc-package/branches/eglibc-2.19/debian/patches/powerpc/cvs-bzero-static-ppc32.diff 2014-04-04 23:00:20 UTC (rev 6011)
+++ glibc-package/branches/eglibc-2.19/debian/patches/powerpc/cvs-bzero-static-ppc32.diff 2014-04-09 22:09:31 UTC (rev 6012)
@@ -1,59 +0,0 @@
-commit dd3946c615184e1957a0cb09352cac72be5d6d5b
-Author: Adhemerval Zanella <azanella@linux.vnet.ibm.com>
-Date: Wed Mar 12 08:55:50 2014 -0500
-
- PowerPC: Fix bzero definition for static libc for PPC32
-
- This patch fixes an issue for powerpc32-fpu static build which fails
- with an 'bzero' undefined reference. This patch adds bzero ifunc selector
- for static builds and fixes the '__bzero_ppc' reference to default
- memset symbol (since static memset build does not provide ifunc
- selector).
-
- Fixes BZ#16689.
-
-2014-03-12 Adhemerval Zanella <azanella@linux.vnet.ibm.com>
-
- [BZ #16689]
- * sysdeps/powerpc/powerpc32/power4/multiarch/bzero-ppc32.S
- (__bzero_ppc): Call memset@local instead of __memset_ppc@local for
- static build.
- * sysdeps/powerpc/powerpc32/power4/multiarch/bzero.c: Build IFUNC
- selector for static builds.
-
-diff --git a/sysdeps/powerpc/powerpc32/power4/multiarch/bzero-ppc32.S b/sysdeps/powerpc/powerpc32/power4/multiarch/bzero-ppc32.S
-index 7a7cca9..80a2dc5 100644
---- a/sysdeps/powerpc/powerpc32/power4/multiarch/bzero-ppc32.S
-+++ b/sysdeps/powerpc/powerpc32/power4/multiarch/bzero-ppc32.S
-@@ -19,8 +19,17 @@
-
- #include <sysdep.h>
-
-+/* memset ifunc selector is not built for static and memset@local
-+ for shared builds makes the linker point the call to the ifunc
-+ selector. */
-+#ifdef SHARED
-+# define MEMSET __memset_ppc
-+#else
-+# define MEMSET memset
-+#endif
-+
- ENTRY (__bzero_ppc)
- mr r5,r4
- li r4,0
-- b __memset_ppc@local
-+ b MEMSET@local
- END (__bzero_ppc)
-diff --git a/sysdeps/powerpc/powerpc32/power4/multiarch/bzero.c b/sysdeps/powerpc/powerpc32/power4/multiarch/bzero.c
-index 2a6298a..baaa6b4 100644
---- a/sysdeps/powerpc/powerpc32/power4/multiarch/bzero.c
-+++ b/sysdeps/powerpc/powerpc32/power4/multiarch/bzero.c
-@@ -17,7 +17,7 @@
- <http://www.gnu.org/licenses/>. */
-
- /* Define multiple versions only for definition in libc. */
--#if defined SHARED && !defined NOT_IN_libc
-+#ifndef NOT_IN_libc
- # include <string.h>
- # include <strings.h>
- # include "init-arch.h"
Deleted: glibc-package/branches/eglibc-2.19/debian/patches/powerpc/cvs-bzero-static-ppc64.diff
===================================================================
--- glibc-package/branches/eglibc-2.19/debian/patches/powerpc/cvs-bzero-static-ppc64.diff 2014-04-04 23:00:20 UTC (rev 6011)
+++ glibc-package/branches/eglibc-2.19/debian/patches/powerpc/cvs-bzero-static-ppc64.diff 2014-04-09 22:09:31 UTC (rev 6012)
@@ -1,58 +0,0 @@
-commit 4facea473059914983b7da8dd654c06b8e3dcc41
-Author: Adhemerval Zanella <azanella@linux.vnet.ibm.com>
-Date: Mon Mar 10 15:26:20 2014 -0500
-
- PowerPC: Fix bzero definition for static libc for PPC64
-
- This patch fixes an issue for powerpc64[le] static build where __bzero
- is definied in multiple places (memset-ppc64.o and bzero.o). It is now
- defined only in bzero.o and memset-ppc64.o only defined __bzero_ppc for
- both dynamic and static library.
-
- Fixes BZ#16683.
-
-2014-03-11 Adhemerval Zanella <azanella@linux.vnet.ibm.com>
-
- [BZ #16683]
- * sysdeps/powerpc/powerpc64/multiarch/memset-ppc64.S (__bzero_ppc):
- Define it for static builds as well.
- (NO_BZERO_IMPL): Likewise.
-
-diff --git a/sysdeps/powerpc/powerpc64/multiarch/memset-ppc64.S b/sysdeps/powerpc/powerpc64/multiarch/memset-ppc64.S
-index 5b234d9e..65b3afe 100644
---- a/sysdeps/powerpc/powerpc64/multiarch/memset-ppc64.S
-+++ b/sysdeps/powerpc/powerpc64/multiarch/memset-ppc64.S
-@@ -18,10 +18,9 @@
-
- #include <sysdep.h>
-
--#if defined SHARED && !defined NOT_IN_libc
--
- /* Copied from bzero.S to prevent the linker from inserting a stub
-- between bzero and memset. */
-+ between bzero and memset. NOTE: this code should be positioned
-+ before ENTRY/END_GEN_TB redefinition. */
- ENTRY (__bzero_ppc)
- CALL_MCOUNT 3
- mr r5,r4
-@@ -29,6 +28,8 @@ ENTRY (__bzero_ppc)
- b L(_memset)
- END_GEN_TB (__bzero_ppc,TB_TOCLESS)
-
-+
-+#if defined SHARED && !defined NOT_IN_libc
- # undef EALIGN
- # define EALIGN(name, alignt, words) \
- .section ".text"; \
-@@ -48,9 +49,9 @@ END_GEN_TB (__bzero_ppc,TB_TOCLESS)
- # undef libc_hidden_builtin_def
- # define libc_hidden_builtin_def(name) \
- .globl __GI_memset; __GI_memset = __memset_ppc
-+#endif
-
- /* Do not implement __bzero at powerpc64/memset.S. */
--# define NO_BZERO_IMPL
--#endif
-+#define NO_BZERO_IMPL
-
- #include <sysdeps/powerpc/powerpc64/memset.S>
Added: glibc-package/branches/eglibc-2.19/debian/patches/powerpc/cvs-ibm-branch.diff
===================================================================
--- glibc-package/branches/eglibc-2.19/debian/patches/powerpc/cvs-ibm-branch.diff (rev 0)
+++ glibc-package/branches/eglibc-2.19/debian/patches/powerpc/cvs-ibm-branch.diff 2014-04-09 22:09:31 UTC (rev 6012)
@@ -0,0 +1,3468 @@
+This patch is generated with:
+
+git diff 55e71ccf31c29a7839344f03e0a7437ea0f5f211 origin/ibm/2.19/master > cvs-ibm-branch.diff
+
+And then edited for ChangeLog and NEWS conflicts.
+
++2014-04-06 Adhemerval Zanella <azanella@linux.vnet.ibm.com>
++
++ [BZ #16815]
++ * sysdeps/powerpc/powerpc32/fpu/s_nearbyint.S (__nearbyint): Fix
++ result for FE_DOWNWARD rounding mode.
++ * sysdeps/powerpc/powerpc32/fpu/s_nearbyintf.S (__nearbyintf):
++ Likewise.
++ * sysdeps/powerpc/fpu/libm-test-ulps: Update.
++
++2014-04-02 Alan Modra <amodra@gmail.com>
++
++ [BZ #16739]
++ * sysdeps/ieee754/ldbl-128ibm/s_nextafterl.c (__nextafterl): Correct
++ output when value is near a power of two. Use int64_t for lx and
++ remove casts. Use decimal rather than hex exponent constants.
++ Don't use long double multiplication when double will suffice.
++ * math/libm-test.inc (nextafter_test_data): Add tests.
++ * NEWS: Add 16739 and 16786 to bug list.
++
++2014-04-02 Alan Modra <amodra@gmail.com>
++
++ * sysdeps/powerpc/powerpc64/power7/memrchr.S: Correct stream hint.
++
++2014-04-02 Alan Modra <amodra@gmail.com>
++
++ * sysdeps/powerpc/powerpc64/start.S: Add @toc to toc symbol reference.
++
++2014-04-01 Alan Modra <amodra@gmail.com>
++
++ [BZ #16786]
++ * sysdeps/powerpc/powerpc64/fpu/s_copysign.S: Don't trash stack.
++
++2014-03-31 Adhemerval Zanella <azanella@linux.vnet.ibm.com>
++
++ * sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S (MFVSRD_R3_V1):
++ Encode instruction correctly in little endian.
++ * sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S (MFVSRD_R3_V1):
++ Likewise.
++ * sysdeps/powerpc/powerpc64/power8/fpu/s_isnan.S (MFVSRD_R3_V1):
++ Likewise.
++ * sysdeps/powerpc/powerpc64/power8/fpu/s_llrint.S (MFVSRD_R3_V1):
++ Likewise.
++ * sysdeps/powerpc/powerpc64/power8/fpu/s_llround.S (MFVSRD_R3_V1):
++ Likewise.
++
++2014-03-20 Adhemerval Zanella <azanella@linux.vnet.ibm.com>
++ Vidya Ranganathan <vidya@linux.vnet.ibm.com>
++
++ * string/strpbrk.c (strpbrk): Using macro to redefine symbol name.
++ * sysdeps/powerpc/powerpc64/multiarch/Makefile: Add strpbrk-power7
++ and strpbrk-ppc64 objects.
++ * sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c
++ (__libc_ifunc_impl_list): Add new strpbrk optimized symbols.
++ * sysdeps/powerpc/powerpc64/multiarch/strpbrk-power7.S: New file:
++ multiarch strpbrk for POWER7.
++ * sysdeps/powerpc/powerpc64/multiarch/strpbrk-ppc64.c: New file:
++ multiarch strpbrk for PPC64.
++ * sysdeps/powerpc/powerpc64/multiarch/strpbrk.c: New file: strpbrk
++ ifunc selector.
++ * sysdeps/powerpc/powerpc64/power7/strpbrk.S: New file: optimited
++ strpbrk for POWER7.
++
++2014-03-20 Adhemerval Zanella <azanella@linux.vnet.ibm.com>
++
++ * string/strcspn.c (strcspn): Using macro to redefine symbol name.
++ * sysdeps/powerpc/powerpc64/multiarch/Makefile: Add strcspn-power7
++ and strcspn-ppc64 objects.
++ * sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c
++ (__libc_ifunc_impl_list): Add new strcspn optimized symbols.
++ * sysdeps/powerpc/powerpc64/multiarch/strcspn-power7.S: New file:
++ multiarch strcspn for POWER7.
++ * sysdeps/powerpc/powerpc64/multiarch/strcspn-ppc64.c: New file:
++ multiarch strcspn for PPC64.
++ * sysdeps/powerpc/powerpc64/multiarch/strcspn.c: New file: strcspn
++ ifunc selector.
++ * sysdeps/powerpc/powerpc64/power7/strcspn.S: New file: optimited
++ strcspn for POWER7.
++
++2014-03-14 Adhemerval Zanella <azanella@linux.vnet.ibm.com>
++
++ [BZ #16707]
++ * sysdeps/powerpc/powerpc64/fpu/s_roundl.S: Remove wrong
++ implementation.
++ * math/libm-test.inc (round_test_data): Add more tests.
++
++2014-03-14 Adhemerval Zanella <azanella@linux.vnet.ibm.com>
++
++ [BZ #16706]
++ * sysdeps/powerpc/powerpc64/fpu/s_nearbyintl.S: Remove wrong
++ implementation.
++ * math/libm-test.inc (nearbyint_test_data): Add more tests.
++
++2014-03-14 Adhemerval Zanella <azanella@linux.vnet.ibm.com>
++
++ [BZ #16701]
++ * sysdeps/powerpc/powerpc64/fpu/s_ceill.S: Remove wrong
++ implementation.
++ * math/libm-test.inc (ceil_test_data): Add more tests.
++
++2014-03-14 Adhemerval Zanella <azanella@linux.vnet.ibm.com>
++
++ * math/libm-test.inc (trunc_test_data): Add more tests related to
++ BZ#16414.
++
++2014-03-12 Adhemerval Zanella <azanella@linux.vnet.ibm.com>
++
++ [BZ #16689]
++ * sysdeps/powerpc/powerpc32/power4/multiarch/bzero-ppc32.S
++ (__bzero_ppc): Call memset@local instead of __memset_ppc@local for
++ static build.
++ * sysdeps/powerpc/powerpc32/power4/multiarch/bzero.c: Build IFUNC
++ selector for static builds.
++
++2014-03-12 Adhemerval Zanella <azanella@linux.vnet.ibm.com>
++
++ * sysdeps/powerpc/powerpc64/multiarch/strspn.c (strspn): Build IFUNC
++ selector for static builds.
++
++2014-03-11 Adhemerval Zanella <azanella@linux.vnet.ibm.com>
++
++ [BZ #16683]
++ * sysdeps/powerpc/powerpc64/multiarch/memset-ppc64.S (__bzero_ppc):
++ Define it for static builds as well.
++ (NO_BZERO_IMPL): Likewise.
++
++2014-03-11 Vidya Ranganathan <vidya@linux.vnet.ibm.com>
++
++ * sysdeps/powerpc/powerpc64/power7/strspn.S: New file: Optimization.
++ * sysdeps/powerpc/powerpc64/multiarch/strspn.c: New file:
++ multiarch strspn for PPC64.
++ * sysdeps/powerpc/powerpc64/multiarch/strspn-ppc64.c: New file
++ * sysdeps/powerpc/powerpc64/multiarch/strspn-power7.S: New file
++ * sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c:
++ (__libc_ifunc_impl_list): Likewise.
++ * sysdeps/powerpc/powerpc64/multiarch/Makefile: Add strspn
++ multiarch optimizations
++ * string/strspn.c (strspn): Using macro to redefine symbol name.
++
++2014-03-10 Vidya Ranganathan <vidya@linux.vnet.ibm.com>
++ Adhemerval Zanella <azanella@linux.vnet.ibm.com>
++
++ * sysdeps/powerpc/powerpc64/power7/strncat.S: New file: Optimization.
++ * sysdeps/powerpc/powerpc64/multiarch/strncat.c: New file:
++ multiarch strncat for PPC64.
++ * sysdeps/powerpc/powerpc64/multiarch/strncat-ppc64.c: New file
++ * sysdeps/powerpc/powerpc64/multiarch/strncat-power7.S: New file
++ * sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c:
++ (__libc_ifunc_impl_list): Likewise.
++ * sysdeps/powerpc/powerpc64/multiarch/Makefile: Add strncat
++ multiarch optimizations
++
++2014-03-03 Rajalakshmi Srinivasaraghavan <raji@linux.vnet.ibm.com>
++
++ * sysdeps/powerpc/powerpc64/power7/strrchr.S: New file.
++ * sysdeps/powerpc/powerpc64/multiarch/Makefile: Add strrchr multiarch
++ implementation.
++ * sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c:
++ (__libc_ifunc_impl_list): Likewise.
++ * sysdeps/powerpc/powerpc64/multiarch/strrchr.c: New file.
++ * sysdeps/powerpc/powerpc64/multiarch/strrchr-ppc64.c: New file.
++ * sysdeps/powerpc/powerpc64/multiarch/strrchr-power7.S: New file.
++ * string/strrchr.c: Define STRRCHR.
++
++2014-02-27 Adhemerval Zanella <azanella@linux.vnet.ibm.com>
++
++ * sysdeps/powerpc/powerpc64/fpu/multiarch/Makefile: Add llround power8
++ implementation.
++ * sysdeps/powerpc/powerpc64/fpu/multiarch/s_llround-power8.S: New file:
++ POWER8 llround ifunc implementation.
++ * sysdeps/powerpc/powerpc64/fpu/multiarch/s_llround.c (__lllround): Add
++ POWER8 implementation.
++ * sysdeps/powerpc/powerpc64/power8/fpu/s_llround.S: New file:
++ POWER8 llround implementation.
++
++2014-02-27 Adhemerval Zanella <azanella@linux.vnet.ibm.com>
++
++ * sysdeps/powerpc/powerpc64/fpu/multiarch/Makefile: Add llrint power8
++ implementation.
++ * sysdeps/powerpc/powerpc64/fpu/multiarch/s_llrint-power8.S: New file:
++ POWER8 llrint ifunc implementation.
++ * sysdeps/powerpc/powerpc64/fpu/multiarch/s_llrint.c (__lllrint): Add
++ POWER8 implementation.
++ * sysdeps/powerpc/powerpc64/power8/fpu/s_llrint.S: New file:
++ POWER8 llrint implementation.
++
++2014-02-27 Adhemerval Zanella <azanella@linux.vnet.ibm.com>
++
++ * sysdeps/powerpc/powerpc64/fpu/multiarch/Makefile: Add finite power8
++ implementation.
++ * sysdeps/powerpc/powerpc64/fpu/multiarch/s_finite-power8.S: New file:
++ POWER8 finite ifunc implementation.
++ * sysdeps/powerpc/powerpc64/fpu/multiarch/s_finite.c (__finite): Add
++ POWER8 implementation.
++ * sysdeps/powerpc/powerpc64/fpu/multiarch/s_finitef.c (__finitef):
++ Likewise.
++ * sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S: New file:
++ POWER8 finite implementation.
++ * sysdeps/powerpc/powerpc64/power8/fpu/s_finitef.S: New file.
++
++2014-02-27 Adhemerval Zanella <azanella@linux.vnet.ibm.com>
++
++ * sysdeps/powerpc/powerpc64/fpu/multiarch/Makefile: Add isinf power8
++ implementation.
++ * sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinf-power8.S: New file:
++ POWER8 isinf ifunc implementation.
++ * sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinf.c (__isinf): Add
++ POWER8 implementation.
++ * sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinff.c (__isinff):
++ Likewise.
++ * sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S: New file:
++ POWER8 isinf implementation.
++ * sysdeps/powerpc/powerpc64/power8/fpu/s_isinff.S: New file.
++
++2014-02-27 Adhemerval Zanella <azanella@linux.vnet.ibm.com>
++
++ * sysdeps/powerpc/powerpc32/power4/multiarch/init-arch.h (INIT_ARCH):
++ Add hwcap2 initialization.
++ * sysdeps/powerpc/powerpc64/fpu/multiarch/Makefile: Add isnan power8
++ implementation.
++ * sysdeps/powerpc/powerpc64/fpu/multiarch/s_isnan-power8.S: New file:
++ POWER8 isnan ifunc implementation.
++ * sysdeps/powerpc/powerpc64/fpu/multiarch/s_isnan.c (__isnan): Add
++ POWER8 implementation.
++ * sysdeps/powerpc/powerpc64/fpu/multiarch/s_isnanf.c (__isnanf):
++ Likewise.
++ * sysdeps/powerpc/powerpc64/power8/fpu/s_isnan.S: New file:
++ POWER8 isnan implementation.
++ * sysdeps/powerpc/powerpc64/power8/fpu/s_isnanf.S: New file.
++
+diff --git a/math/libm-test.inc b/math/libm-test.inc
+index 027dfb9..cf07069 100644
+--- a/math/libm-test.inc
++++ b/math/libm-test.inc
+@@ -6000,6 +6000,15 @@ static const struct test_f_f_data ceil_test_data[] =
+ TEST_f_f (ceil, -72057594037927936.75L, -72057594037927936.0L),
+ TEST_f_f (ceil, -72057594037927937.5L, -72057594037927937.0L),
+
++ /* Check cases where first double is a exact integer higher than 2^52 and
++ the precision is determined by second long double for IBM long double. */
++ TEST_f_f (ceil, 34503599627370498.515625L, 34503599627370499.0L),
++ TEST_f_f (ceil, -34503599627370498.515625L, -34503599627370498.0L),
++# if LDBL_MANT_DIG >= 106
++ TEST_f_f (ceil, 1192568192774434123539907640624.484375L, 1192568192774434123539907640625.0L),
++ TEST_f_f (ceil, -1192568192774434123539907640624.484375L, -1192568192774434123539907640624.0L),
++# endif
++
+ TEST_f_f (ceil, 10141204801825835211973625643007.5L, 10141204801825835211973625643008.0L),
+ TEST_f_f (ceil, 10141204801825835211973625643008.25L, 10141204801825835211973625643009.0L),
+ TEST_f_f (ceil, 10141204801825835211973625643008.5L, 10141204801825835211973625643009.0L),
+@@ -10495,6 +10504,16 @@ static const struct test_f_f_data nearbyint_test_data[] =
+ TEST_f_f (nearbyint, -562949953421312.75, -562949953421313.0, NO_INEXACT_EXCEPTION),
+ TEST_f_f (nearbyint, -1125899906842624.75, -1125899906842625.0, NO_INEXACT_EXCEPTION),
+ #endif
++#ifdef TEST_LDOUBLE
++ /* Check cases where first double is a exact integer higher than 2^52 and
++ the precision is determined by second long double for IBM long double. */
++ TEST_f_f (nearbyint, 34503599627370498.515625L, 34503599627370499.0L),
++ TEST_f_f (nearbyint, -34503599627370498.515625L, -34503599627370499.0L),
++# if LDBL_MANT_DIG >= 106
++ TEST_f_f (nearbyint, 1192568192774434123539907640624.484375L, 1192568192774434123539907640624.0L),
++ TEST_f_f (nearbyint, -1192568192774434123539907640624.484375L, -1192568192774434123539907640624.0L),
++# endif
++#endif
+ };
+
+ static void
+@@ -10528,6 +10547,14 @@ static const struct test_ff_f_data nextafter_test_data[] =
+ // XXX Enable once gcc is fixed.
+ //TEST_ff_f (nextafter, 0x0.00000040000000000000p-16385L, -0.1L, 0x0.0000003ffffffff00000p-16385L),
+ #endif
++#if defined TEST_LDOUBLE && LDBL_MANT_DIG == 106
++ TEST_ff_f (nextafter, 1.0L, -10.0L, 1.0L-0x1p-106L, NO_EXCEPTION),
++ TEST_ff_f (nextafter, 1.0L, 10.0L, 1.0L+0x1p-105L, NO_EXCEPTION),
++ TEST_ff_f (nextafter, 1.0L-0x1p-106L, 10.0L, 1.0L, NO_EXCEPTION),
++ TEST_ff_f (nextafter, -1.0L, -10.0L, -1.0L-0x1p-105L, NO_EXCEPTION),
++ TEST_ff_f (nextafter, -1.0L, 10.0L, -1.0L+0x1p-106L, NO_EXCEPTION),
++ TEST_ff_f (nextafter, -1.0L+0x1p-106L, -10.0L, -1.0L, NO_EXCEPTION),
++#endif
+
+ /* XXX We need the hexadecimal FP number representation here for further
+ tests. */
+@@ -11784,6 +11811,15 @@ static const struct test_f_f_data round_test_data[] =
+ TEST_f_f (round, -72057594037927936.75L, -72057594037927937.0L),
+ TEST_f_f (round, -72057594037927937.5L, -72057594037927938.0L),
+
++ /* Check cases where first double is a exact integer higher than 2^52 and
++ the precision is determined by second long double for IBM long double. */
++ TEST_f_f (round, 34503599627370498.515625L, 34503599627370499.0L),
++ TEST_f_f (round, -34503599627370498.515625L, -34503599627370499.0L),
++# if LDBL_MANT_DIG >= 106
++ TEST_f_f (round, 1192568192774434123539907640624.484375L, 1192568192774434123539907640624.0L),
++ TEST_f_f (round, -1192568192774434123539907640624.484375L, -1192568192774434123539907640624.0L),
++# endif
++
+ TEST_f_f (round, 10141204801825835211973625643007.5L, 10141204801825835211973625643008.0L),
+ TEST_f_f (round, 10141204801825835211973625643008.25L, 10141204801825835211973625643008.0L),
+ TEST_f_f (round, 10141204801825835211973625643008.5L, 10141204801825835211973625643009.0L),
+@@ -12461,6 +12497,15 @@ static const struct test_f_f_data trunc_test_data[] =
+ TEST_f_f (trunc, -72057594037927936.75L, -72057594037927936.0L),
+ TEST_f_f (trunc, -72057594037927937.5L, -72057594037927937.0L),
+
++ /* Check cases where first double is a exact integer higher than 2^52 and
++ the precision is determined by second long double for IBM long double. */
++ TEST_f_f (trunc, 34503599627370498.515625L, 34503599627370498.0L),
++ TEST_f_f (trunc, -34503599627370498.515625L, -34503599627370498.0L),
++# if LDBL_MANT_DIG >= 106
++ TEST_f_f (trunc, 1192568192774434123539907640624.484375L, 1192568192774434123539907640624.0L),
++ TEST_f_f (trunc, -1192568192774434123539907640624.484375L, -1192568192774434123539907640624.0L),
++# endif
++
+ TEST_f_f (trunc, 10141204801825835211973625643007.5L, 10141204801825835211973625643007.0L),
+ TEST_f_f (trunc, 10141204801825835211973625643008.25L, 10141204801825835211973625643008.0L),
+ TEST_f_f (trunc, 10141204801825835211973625643008.5L, 10141204801825835211973625643008.0L),
+diff --git a/string/strcspn.c b/string/strcspn.c
+index 7c39f79..4316205 100644
+--- a/string/strcspn.c
++++ b/string/strcspn.c
+@@ -15,27 +15,18 @@
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+-#if HAVE_CONFIG_H
+-# include <config.h>
+-#endif
+-
+-#if defined _LIBC || HAVE_STRING_H
+-# include <string.h>
+-#else
+-# include <strings.h>
+-# ifndef strchr
+-# define strchr index
+-# endif
+-#endif
++#include <string.h>
+
+ #undef strcspn
+
++#ifndef STRCSPN
++# define STRCSPN strcspn
++#endif
++
+ /* Return the length of the maximum initial segment of S
+ which contains no characters from REJECT. */
+ size_t
+-strcspn (s, reject)
+- const char *s;
+- const char *reject;
++STRCSPN (const char *s, const char *reject)
+ {
+ size_t count = 0;
+
+diff --git a/string/strpbrk.c b/string/strpbrk.c
+index ce33b68..a694242 100644
+--- a/string/strpbrk.c
++++ b/string/strpbrk.c
+@@ -15,21 +15,17 @@
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+-#ifdef HAVE_CONFIG_H
+-# include <config.h>
+-#endif
+-
+-#if defined _LIBC || defined HAVE_CONFIG_H
+-# include <string.h>
+-#endif
++#include <string.h>
+
+ #undef strpbrk
+
++#ifndef STRPBRK
++#define STRPBRK strpbrk
++#endif
++
+ /* Find the first occurrence in S of any character in ACCEPT. */
+ char *
+-strpbrk (s, accept)
+- const char *s;
+- const char *accept;
++STRPBRK (const char *s, const char *accept)
+ {
+ while (*s != '\0')
+ {
+diff --git a/string/strrchr.c b/string/strrchr.c
+index b5b4bc6..47ff08c 100644
+--- a/string/strrchr.c
++++ b/string/strrchr.c
+@@ -19,9 +19,13 @@
+
+ #undef strrchr
+
++#ifndef STRRCHR
++# define STRRCHR strrchr
++#endif
++
+ /* Find the last occurrence of C in S. */
+ char *
+-strrchr (const char *s, int c)
++STRRCHR (const char *s, int c)
+ {
+ const char *found, *p;
+
+diff --git a/string/strspn.c b/string/strspn.c
+index 37e8161..c2d6364 100644
+--- a/string/strspn.c
++++ b/string/strspn.c
+@@ -18,13 +18,14 @@
+ #include <string.h>
+
+ #undef strspn
++#ifndef STRSPN
++#define STRSPN strspn
++#endif
+
+ /* Return the length of the maximum initial segment
+ of S which contains only characters in ACCEPT. */
+ size_t
+-strspn (s, accept)
+- const char *s;
+- const char *accept;
++STRSPN (const char *s, const char *accept)
+ {
+ const char *p;
+ const char *a;
+diff --git a/sysdeps/ieee754/ldbl-128ibm/s_nextafterl.c b/sysdeps/ieee754/ldbl-128ibm/s_nextafterl.c
+index c050944..7b09927 100644
+--- a/sysdeps/ieee754/ldbl-128ibm/s_nextafterl.c
++++ b/sysdeps/ieee754/ldbl-128ibm/s_nextafterl.c
+@@ -30,8 +30,7 @@ static char rcsid[] = "$NetBSD: $";
+
+ long double __nextafterl(long double x, long double y)
+ {
+- int64_t hx,hy,ihx,ihy;
+- uint64_t lx;
++ int64_t hx, hy, ihx, ihy, lx;
+ double xhi, xlo, yhi;
+
+ ldbl_unpack (x, &xhi, &xlo);
+@@ -76,19 +75,28 @@ long double __nextafterl(long double x, long double y)
+ u = math_opt_barrier (x);
+ x -= __LDBL_DENORM_MIN__;
+ if (ihx < 0x0360000000000000LL
+- || (hx > 0 && (int64_t) lx <= 0)
+- || (hx < 0 && (int64_t) lx > 1)) {
++ || (hx > 0 && lx <= 0)
++ || (hx < 0 && lx > 1)) {
+ u = u * u;
+ math_force_eval (u); /* raise underflow flag */
+ }
+ return x;
+ }
+- if (ihx < 0x06a0000000000000LL) { /* ulp will denormal */
+- INSERT_WORDS64 (yhi, hx & (0x7ffLL<<52));
+- u = yhi;
+- u *= 0x1.0000000000000p-105L;
++ /* If the high double is an exact power of two and the low
++ double is the opposite sign, then 1ulp is one less than
++ what we might determine from the high double. Similarly
++ if X is an exact power of two, and positive, because
++ making it a little smaller will result in the exponent
++ decreasing by one and normalisation of the mantissa. */
++ if ((hx & 0x000fffffffffffffLL) == 0
++ && ((lx != 0 && (hx ^ lx) < 0)
++ || (lx == 0 && hx >= 0)))
++ ihx -= 1LL << 52;
++ if (ihx < (106LL << 52)) { /* ulp will denormal */
++ INSERT_WORDS64 (yhi, ihx & (0x7ffLL<<52));
++ u = yhi * 0x1p-105;
+ } else {
+- INSERT_WORDS64 (yhi, (hx & (0x7ffLL<<52))-(0x069LL<<52));
++ INSERT_WORDS64 (yhi, (ihx & (0x7ffLL<<52))-(105LL<<52));
+ u = yhi;
+ }
+ return x - u;
+@@ -103,8 +111,8 @@ long double __nextafterl(long double x, long double y)
+ u = math_opt_barrier (x);
+ x += __LDBL_DENORM_MIN__;
+ if (ihx < 0x0360000000000000LL
+- || (hx > 0 && (int64_t) lx < 0 && lx != 0x8000000000000001LL)
+- || (hx < 0 && (int64_t) lx >= 0)) {
++ || (hx > 0 && lx < 0 && lx != 0x8000000000000001LL)
++ || (hx < 0 && lx >= 0)) {
+ u = u * u;
+ math_force_eval (u); /* raise underflow flag */
+ }
+@@ -112,12 +120,21 @@ long double __nextafterl(long double x, long double y)
+ x = -0.0L;
+ return x;
+ }
+- if (ihx < 0x06a0000000000000LL) { /* ulp will denormal */
+- INSERT_WORDS64 (yhi, hx & (0x7ffLL<<52));
+- u = yhi;
+- u *= 0x1.0000000000000p-105L;
++ /* If the high double is an exact power of two and the low
++ double is the opposite sign, then 1ulp is one less than
++ what we might determine from the high double. Similarly
++ if X is an exact power of two, and negative, because
++ making it a little larger will result in the exponent
++ decreasing by one and normalisation of the mantissa. */
++ if ((hx & 0x000fffffffffffffLL) == 0
++ && ((lx != 0 && (hx ^ lx) < 0)
++ || (lx == 0 && hx < 0)))
++ ihx -= 1LL << 52;
++ if (ihx < (106LL << 52)) { /* ulp will denormal */
++ INSERT_WORDS64 (yhi, ihx & (0x7ffLL<<52));
++ u = yhi * 0x1p-105;
+ } else {
+- INSERT_WORDS64 (yhi, (hx & (0x7ffLL<<52))-(0x069LL<<52));
++ INSERT_WORDS64 (yhi, (ihx & (0x7ffLL<<52))-(105LL<<52));
+ u = yhi;
+ }
+ return x + u;
+diff --git a/sysdeps/powerpc/powerpc32/fpu/s_nearbyint.S b/sysdeps/powerpc/powerpc32/fpu/s_nearbyint.S
+index 2734738..05ab40e 100644
+--- a/sysdeps/powerpc/powerpc32/fpu/s_nearbyint.S
++++ b/sysdeps/powerpc/powerpc32/fpu/s_nearbyint.S
+@@ -53,17 +53,17 @@ ENTRY (__nearbyint)
+ fcmpu cr7,fp1,fp12 /* if (x > 0.0 */
+ ble cr7,L(lessthanzero)
+ mtfsb0 4*cr7+lt /* Disable FE_INEXACT exception */
+- fadd fp0,fp1,fp13 /* x += TWO52 */
+- fsub fp1,fp0,fp13 /* x -= TWO52 */
++ fadd fp1,fp1,fp13 /* x += TWO52 */
++ fsub fp1,fp1,fp13 /* x -= TWO52 */
+ fabs fp1,fp1 /* if (x == 0.0 */
+ mtfsb0 4*cr1+eq /* Clear any FE_INEXACT exception */
+ blr
+ L(lessthanzero):
+ bgelr cr7
+ mtfsb0 4*cr7+lt /* Disable FE_INEXACT exception */
+- fsub fp0,fp13,fp1 /* x -= TWO52 */
+- fsub fp0,fp0,fp13 /* x += TWO52 */
+- fneg fp1,fp0 /* if (x == 0.0) */
++ fsub fp1,fp1,fp13 /* x -= TWO52 */
++ fadd fp1,fp1,fp13 /* x += TWO52 */
++ fnabs fp1,fp1 /* if (x == 0.0) */
+ mtfsb0 4*cr1+eq /* Clear any FE_INEXACT exception */
+ blr
+ END (__nearbyint)
+diff --git a/sysdeps/powerpc/powerpc32/fpu/s_nearbyintf.S b/sysdeps/powerpc/powerpc32/fpu/s_nearbyintf.S
+index 11bdc77..7449a5f 100644
+--- a/sysdeps/powerpc/powerpc32/fpu/s_nearbyintf.S
++++ b/sysdeps/powerpc/powerpc32/fpu/s_nearbyintf.S
+@@ -52,16 +52,17 @@ ENTRY (__nearbyintf)
+ fcmpu cr7,fp1,fp12 /* if (x > 0.0 */
+ ble cr7,L(lessthanzero)
+ mtfsb0 4*cr7+lt /* Disable FE_INEXACT exception */
+- fadds fp0,fp1,fp13 /* x += TWO23 */
+- fsubs fp1,fp0,fp13 /* x -= TWO23 */
++ fadds fp1,fp1,fp13 /* x += TWO23 */
++ fsubs fp1,fp1,fp13 /* x -= TWO23 */
++ fabs fp1,fp1 /* if (x == 0.0) */
+ mtfsb0 4*cr1+eq /* Clear any FE_INEXACT exception */
+ blr
+ L(lessthanzero):
+ bgelr cr7
+ mtfsb0 4*cr7+lt /* Disable FE_INEXACT exception */
+- fsubs fp0,fp13,fp1 /* x -= TWO23 */
+- fsubs fp0,fp0,fp13 /* x += TWO23 */
+- fneg fp1,fp0 /* if (x == 0.0) */
++ fsubs fp1,fp1,fp13 /* x -= TWO23 */
++ fadds fp1,fp1,fp13 /* x += TWO23 */
++ fnabs fp1,fp1 /* if (x == 0.0) */
+ mtfsb0 4*cr1+eq /* Clear any FE_INEXACT exception */
+ blr
+ END (__nearbyintf)
+diff --git a/sysdeps/powerpc/powerpc32/power4/multiarch/bzero-ppc32.S b/sysdeps/powerpc/powerpc32/power4/multiarch/bzero-ppc32.S
+index 7a7cca9..80a2dc5 100644
+--- a/sysdeps/powerpc/powerpc32/power4/multiarch/bzero-ppc32.S
++++ b/sysdeps/powerpc/powerpc32/power4/multiarch/bzero-ppc32.S
+@@ -19,8 +19,17 @@
+
+ #include <sysdep.h>
+
++/* memset ifunc selector is not built for static and memset@local
++ for shared builds makes the linker point the call to the ifunc
++ selector. */
++#ifdef SHARED
++# define MEMSET __memset_ppc
++#else
++# define MEMSET memset
++#endif
++
+ ENTRY (__bzero_ppc)
+ mr r5,r4
+ li r4,0
+- b __memset_ppc@local
++ b MEMSET@local
+ END (__bzero_ppc)
+diff --git a/sysdeps/powerpc/powerpc32/power4/multiarch/bzero.c b/sysdeps/powerpc/powerpc32/power4/multiarch/bzero.c
+index 2a6298a..baaa6b4 100644
+--- a/sysdeps/powerpc/powerpc32/power4/multiarch/bzero.c
++++ b/sysdeps/powerpc/powerpc32/power4/multiarch/bzero.c
+@@ -17,7 +17,7 @@
+ <http://www.gnu.org/licenses/>. */
+
+ /* Define multiple versions only for definition in libc. */
+-#if defined SHARED && !defined NOT_IN_libc
++#ifndef NOT_IN_libc
+ # include <string.h>
+ # include <strings.h>
+ # include "init-arch.h"
+diff --git a/sysdeps/powerpc/powerpc32/power4/multiarch/init-arch.h b/sysdeps/powerpc/powerpc32/power4/multiarch/init-arch.h
+index 51a34f2..72d720d 100644
+--- a/sysdeps/powerpc/powerpc32/power4/multiarch/init-arch.h
++++ b/sysdeps/powerpc/powerpc32/power4/multiarch/init-arch.h
+@@ -36,6 +36,7 @@
+ and fills the previous ones. */
+ #define INIT_ARCH() \
+ unsigned long int hwcap = __GLRO(dl_hwcap); \
++ unsigned long int __attribute__((unused)) hwcap2 = __GLRO(dl_hwcap2); \
+ if (hwcap & PPC_FEATURE_ARCH_2_06) \
+ hwcap |= PPC_FEATURE_ARCH_2_05 | \
+ PPC_FEATURE_POWER5_PLUS | \
+diff --git a/sysdeps/powerpc/powerpc64/fpu/multiarch/Makefile b/sysdeps/powerpc/powerpc64/fpu/multiarch/Makefile
+index ebf957e..0e3eac7 100644
+--- a/sysdeps/powerpc/powerpc64/fpu/multiarch/Makefile
++++ b/sysdeps/powerpc/powerpc64/fpu/multiarch/Makefile
+@@ -4,7 +4,8 @@ sysdep_routines += s_isnan-power7 s_isnan-power6x s_isnan-power6 \
+ s_copysign-ppc64 s_finite-power7 s_finite-ppc64 \
+ s_finitef-ppc64 s_isinff-ppc64 s_isinf-power7 \
+ s_isinf-ppc64 s_modf-power5+ s_modf-ppc64 \
+- s_modff-power5+ s_modff-ppc64
++ s_modff-power5+ s_modff-ppc64 s_isnan-power8 \
++ s_isinf-power8 s_finite-power8
+
+ libm-sysdep_routines += s_isnan-power7 s_isnan-power6x s_isnan-power6 \
+ s_isnan-power5 s_isnan-ppc64 s_llround-power6x \
+@@ -21,7 +22,9 @@ libm-sysdep_routines += s_isnan-power7 s_isnan-power6x s_isnan-power6 \
+ s_logbl-power7 s_logb-ppc64 s_logbf-ppc64 \
+ s_logbl-ppc64 s_modf-power5+ s_modf-ppc64 \
+ s_modff-power5+ s_modff-ppc64 e_hypot-ppc64 \
+- e_hypot-power7 e_hypotf-ppc64 e_hypotf-power7
++ e_hypot-power7 e_hypotf-ppc64 e_hypotf-power7 \
++ s_isnan-power8 s_isinf-power8 s_finite-power8 \
++ s_llrint-power8 s_llround-power8
+
+ CFLAGS-s_logbf-power7.c = -mcpu=power7
+ CFLAGS-s_logbl-power7.c = -mcpu=power7
+diff --git a/sysdeps/powerpc/powerpc64/fpu/multiarch/s_finite-power8.S b/sysdeps/powerpc/powerpc64/fpu/multiarch/s_finite-power8.S
+new file mode 100644
+index 0000000..3b9071f
+--- /dev/null
++++ b/sysdeps/powerpc/powerpc64/fpu/multiarch/s_finite-power8.S
+@@ -0,0 +1,33 @@
++/* isnan(). PowerPC64/POWER7 version.
++ Copyright (C) 2014 Free Software Foundation, Inc.
++ This file is part of the GNU C Library.
++
++ The GNU C Library is free software; you can redistribute it and/or
++ modify it under the terms of the GNU Lesser General Public
++ License as published by the Free Software Foundation; either
++ version 2.1 of the License, or (at your option) any later version.
++
++ The GNU C Library is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ Lesser General Public License for more details.
++
++ You should have received a copy of the GNU Lesser General Public
++ License along with the GNU C Library; if not, see
++ <http://www.gnu.org/licenses/>. */
++
++#include <sysdep.h>
++#include <math_ldbl_opt.h>
++
++#undef hidden_def
++#define hidden_def(name)
++#undef weak_alias
++#define weak_alias(name, alias)
++#undef strong_alias
++#define strong_alias(name, alias)
++#undef compat_symbol
++#define compat_symbol(lib, name, symbol, ver)
++
++#define __finite __finite_power8
++
++#include <sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S>
+diff --git a/sysdeps/powerpc/powerpc64/fpu/multiarch/s_finite.c b/sysdeps/powerpc/powerpc64/fpu/multiarch/s_finite.c
+index f79a93e..b9e908d 100644
+--- a/sysdeps/powerpc/powerpc64/fpu/multiarch/s_finite.c
++++ b/sysdeps/powerpc/powerpc64/fpu/multiarch/s_finite.c
+@@ -23,10 +23,13 @@
+
+ extern __typeof (__finite) __finite_ppc64 attribute_hidden;
+ extern __typeof (__finite) __finite_power7 attribute_hidden;
++extern __typeof (__finite) __finite_power8 attribute_hidden;
+
+ libc_ifunc (__finite,
+- (hwcap & PPC_FEATURE_ARCH_2_06)
+- ? __finite_power7
++ (hwcap2 & PPC_FEATURE2_ARCH_2_07)
++ ? __finite_power8 :
++ (hwcap & PPC_FEATURE_ARCH_2_06)
++ ? __finite_power7
+ : __finite_ppc64);
+
+ weak_alias (__finite, finite)
+diff --git a/sysdeps/powerpc/powerpc64/fpu/multiarch/s_finitef.c b/sysdeps/powerpc/powerpc64/fpu/multiarch/s_finitef.c
+index a7243b5..30b34bc 100644
+--- a/sysdeps/powerpc/powerpc64/fpu/multiarch/s_finitef.c
++++ b/sysdeps/powerpc/powerpc64/fpu/multiarch/s_finitef.c
+@@ -23,10 +23,13 @@
+ extern __typeof (__finitef) __finitef_ppc64 attribute_hidden;
+ /* The double-precision version also works for single-precision. */
+ extern __typeof (__finitef) __finite_power7 attribute_hidden;
++extern __typeof (__finitef) __finite_power8 attribute_hidden;
+
+ libc_ifunc (__finitef,
+- (hwcap & PPC_FEATURE_ARCH_2_06)
+- ? __finite_power7
++ (hwcap2 & PPC_FEATURE2_ARCH_2_07)
++ ? __finite_power8 :
++ (hwcap & PPC_FEATURE_ARCH_2_06)
++ ? __finite_power7
+ : __finitef_ppc64);
+
+ weak_alias (__finitef, finitef)
+diff --git a/sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinf-power8.S b/sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinf-power8.S
+new file mode 100644
+index 0000000..979816e
+--- /dev/null
++++ b/sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinf-power8.S
+@@ -0,0 +1,33 @@
++/* isinf(). PowerPC64/POWER8 version.
++ Copyright (C) 2014 Free Software Foundation, Inc.
++ This file is part of the GNU C Library.
++
++ The GNU C Library is free software; you can redistribute it and/or
++ modify it under the terms of the GNU Lesser General Public
++ License as published by the Free Software Foundation; either
++ version 2.1 of the License, or (at your option) any later version.
++
++ The GNU C Library is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ Lesser General Public License for more details.
++
++ You should have received a copy of the GNU Lesser General Public
++ License along with the GNU C Library; if not, see
++ <http://www.gnu.org/licenses/>. */
++
++#include <sysdep.h>
++#include <math_ldbl_opt.h>
++
++#undef hidden_def
++#define hidden_def(name)
++#undef weak_alias
++#define weak_alias(name, alias)
++#undef strong_alias
++#define strong_alias(name, alias)
++#undef compat_symbol
++#define compat_symbol(lib, name, alias, ver)
++
++#define __isinf __isinf_power8
++
++#include <sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S>
+diff --git a/sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinf.c b/sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinf.c
+index 1ee230b..e349a06 100644
+--- a/sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinf.c
++++ b/sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinf.c
+@@ -23,10 +23,13 @@
+
+ extern __typeof (__isinf) __isinf_ppc64 attribute_hidden;
+ extern __typeof (__isinf) __isinf_power7 attribute_hidden;
++extern __typeof (__isinf) __isinf_power8 attribute_hidden;
+
+ libc_ifunc (__isinf,
+- (hwcap & PPC_FEATURE_ARCH_2_06)
+- ? __isinf_power7
++ (hwcap2 & PPC_FEATURE2_ARCH_2_07)
++ ? __isinf_power8 :
++ (hwcap & PPC_FEATURE_ARCH_2_06)
++ ? __isinf_power7
+ : __isinf_ppc64);
+
+ weak_alias (__isinf, isinf)
+diff --git a/sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinff.c b/sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinff.c
+index 1336feb..71da7a3 100644
+--- a/sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinff.c
++++ b/sysdeps/powerpc/powerpc64/fpu/multiarch/s_isinff.c
+@@ -24,10 +24,13 @@
+ extern __typeof (__isinff) __isinff_ppc64 attribute_hidden;
+ /* The double-precision version also works for single-precision. */
+ extern __typeof (__isinff) __isinf_power7 attribute_hidden;
++extern __typeof (__isinff) __isinf_power8 attribute_hidden;
+
+ libc_ifunc (__isinff,
+- (hwcap & PPC_FEATURE_ARCH_2_06)
+- ? __isinf_power7
++ (hwcap2 & PPC_FEATURE2_ARCH_2_07)
++ ? __isinf_power8 :
++ (hwcap & PPC_FEATURE_ARCH_2_06)
++ ? __isinf_power7
+ : __isinff_ppc64);
+
+ weak_alias (__isinff, isinff)
+diff --git a/sysdeps/powerpc/powerpc64/fpu/multiarch/s_isnan-power8.S b/sysdeps/powerpc/powerpc64/fpu/multiarch/s_isnan-power8.S
+new file mode 100644
+index 0000000..c176d5a
+--- /dev/null
++++ b/sysdeps/powerpc/powerpc64/fpu/multiarch/s_isnan-power8.S
+@@ -0,0 +1,33 @@
++/* isnan(). PowerPC64/POWER7 version.
++ Copyright (C) 2014 Free Software Foundation, Inc.
++ This file is part of the GNU C Library.
++
++ The GNU C Library is free software; you can redistribute it and/or
++ modify it under the terms of the GNU Lesser General Public
++ License as published by the Free Software Foundation; either
++ version 2.1 of the License, or (at your option) any later version.
++
++ The GNU C Library is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ Lesser General Public License for more details.
++
++ You should have received a copy of the GNU Lesser General Public
++ License along with the GNU C Library; if not, see
++ <http://www.gnu.org/licenses/>. */
++
++#include <sysdep.h>
++#include <math_ldbl_opt.h>
++
++#undef hidden_def
++#define hidden_def(name)
++#undef weak_alias
++#define weak_alias(name, alias)
++#undef strong_alias
++#define strong_alias(name, alias)
++#undef compat_symbol
++#define compat_symbol(lib, name, symbol, ver)
++
++#define __isnan __isnan_power8
++
++#include <sysdeps/powerpc/powerpc64/power8/fpu/s_isnan.S>
+diff --git a/sysdeps/powerpc/powerpc64/fpu/multiarch/s_isnan.c b/sysdeps/powerpc/powerpc64/fpu/multiarch/s_isnan.c
+index 0de833e..65a5ca0 100644
+--- a/sysdeps/powerpc/powerpc64/fpu/multiarch/s_isnan.c
++++ b/sysdeps/powerpc/powerpc64/fpu/multiarch/s_isnan.c
+@@ -26,16 +26,19 @@ extern __typeof (__isnan) __isnan_power5 attribute_hidden;
+ extern __typeof (__isnan) __isnan_power6 attribute_hidden;
+ extern __typeof (__isnan) __isnan_power6x attribute_hidden;
+ extern __typeof (__isnan) __isnan_power7 attribute_hidden;
++extern __typeof (__isnan) __isnan_power8 attribute_hidden;
+
+ libc_ifunc (__isnan,
+- (hwcap & PPC_FEATURE_ARCH_2_06)
+- ? __isnan_power7 :
+- (hwcap & PPC_FEATURE_POWER6_EXT)
++ (hwcap2 & PPC_FEATURE2_ARCH_2_07)
++ ? __isnan_power8 :
++ (hwcap & PPC_FEATURE_ARCH_2_06)
++ ? __isnan_power7 :
++ (hwcap & PPC_FEATURE_POWER6_EXT)
+ ? __isnan_power6x :
+- (hwcap & PPC_FEATURE_ARCH_2_05)
+- ? __isnan_power6 :
+- (hwcap & PPC_FEATURE_POWER5)
+- ? __isnan_power5
++ (hwcap & PPC_FEATURE_ARCH_2_05)
++ ? __isnan_power6 :
++ (hwcap & PPC_FEATURE_POWER5)
++ ? __isnan_power5
+ : __isnan_ppc64);
+
+ weak_alias (__isnan, isnan)
+diff --git a/sysdeps/powerpc/powerpc64/fpu/multiarch/s_isnanf.c b/sysdeps/powerpc/powerpc64/fpu/multiarch/s_isnanf.c
+index b237455..eb68a50 100644
+--- a/sysdeps/powerpc/powerpc64/fpu/multiarch/s_isnanf.c
++++ b/sysdeps/powerpc/powerpc64/fpu/multiarch/s_isnanf.c
+@@ -25,16 +25,19 @@ extern __typeof (__isnanf) __isnan_power5 attribute_hidden;
+ extern __typeof (__isnanf) __isnan_power6 attribute_hidden;
+ extern __typeof (__isnanf) __isnan_power6x attribute_hidden;
+ extern __typeof (__isnanf) __isnan_power7 attribute_hidden;
++extern __typeof (__isnanf) __isnan_power8 attribute_hidden;
+
+ libc_ifunc (__isnanf,
+- (hwcap & PPC_FEATURE_ARCH_2_06)
+- ? __isnan_power7 :
+- (hwcap & PPC_FEATURE_POWER6_EXT)
+- ? __isnan_power6x :
+- (hwcap & PPC_FEATURE_ARCH_2_05)
+- ? __isnan_power6 :
+- (hwcap & PPC_FEATURE_POWER5)
+- ? __isnan_power5
++ (hwcap2 & PPC_FEATURE2_ARCH_2_07)
++ ? __isnan_power8 :
++ (hwcap & PPC_FEATURE_ARCH_2_06)
++ ? __isnan_power7 :
++ (hwcap & PPC_FEATURE_POWER6_EXT)
++ ? __isnan_power6x :
++ (hwcap & PPC_FEATURE_ARCH_2_05)
++ ? __isnan_power6 :
++ (hwcap & PPC_FEATURE_POWER5)
++ ? __isnan_power5
+ : __isnan_ppc64);
+
+ weak_alias (__isnanf, isnanf)
+diff --git a/sysdeps/powerpc/powerpc64/fpu/multiarch/s_llrint-power8.S b/sysdeps/powerpc/powerpc64/fpu/multiarch/s_llrint-power8.S
+new file mode 100644
+index 0000000..3962b7d
+--- /dev/null
++++ b/sysdeps/powerpc/powerpc64/fpu/multiarch/s_llrint-power8.S
+@@ -0,0 +1,31 @@
++/* Round double to long int. PowerPC64/POWER6X default version.
++ Copyright (C) 2014 Free Software Foundation, Inc.
++ This file is part of the GNU C Library.
++
++ The GNU C Library is free software; you can redistribute it and/or
++ modify it under the terms of the GNU Lesser General Public
++ License as published by the Free Software Foundation; either
++ version 2.1 of the License, or (at your option) any later version.
++
++ The GNU C Library is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ Lesser General Public License for more details.
++
++ You should have received a copy of the GNU Lesser General Public
++ License along with the GNU C Library; if not, see
++ <http://www.gnu.org/licenses/>. */
++
++#include <sysdep.h>
++#include <math_ldbl_opt.h>
++
++#undef weak_alias
++#define weak_alias(a,b)
++#undef strong_alias
++#define strong_alias(a,b)
++#undef compat_symbol
++#define compat_symbol(a,b,c,d)
++
++#define __llrint __llrint_power8
++
++#include <sysdeps/powerpc/powerpc64/power8/fpu/s_llrint.S>
+diff --git a/sysdeps/powerpc/powerpc64/fpu/multiarch/s_llrint.c b/sysdeps/powerpc/powerpc64/fpu/multiarch/s_llrint.c
+index 5818b53..cf1b2e4 100644
+--- a/sysdeps/powerpc/powerpc64/fpu/multiarch/s_llrint.c
++++ b/sysdeps/powerpc/powerpc64/fpu/multiarch/s_llrint.c
+@@ -30,10 +30,13 @@
+
+ extern __typeof (__llrint) __llrint_ppc64 attribute_hidden;
+ extern __typeof (__llrint) __llrint_power6x attribute_hidden;
++extern __typeof (__llrint) __llrint_power8 attribute_hidden;
+
+ libc_ifunc (__llrint,
+- (hwcap & PPC_FEATURE_POWER6_EXT)
+- ? __llrint_power6x
++ (hwcap2 & PPC_FEATURE2_ARCH_2_07)
++ ? __llrint_power8 :
++ (hwcap & PPC_FEATURE_POWER6_EXT)
++ ? __llrint_power6x
+ : __llrint_ppc64);
+
+ weak_alias (__llrint, llrint)
+diff --git a/sysdeps/powerpc/powerpc64/fpu/multiarch/s_llround-power8.S b/sysdeps/powerpc/powerpc64/fpu/multiarch/s_llround-power8.S
+new file mode 100644
+index 0000000..41c61a1
+--- /dev/null
++++ b/sysdeps/powerpc/powerpc64/fpu/multiarch/s_llround-power8.S
+@@ -0,0 +1,31 @@
++/* llround(). PowerPC64 default version.
++ Copyright (C) 2014 Free Software Foundation, Inc.
++ This file is part of the GNU C Library.
++
++ The GNU C Library is free software; you can redistribute it and/or
++ modify it under the terms of the GNU Lesser General Public
++ License as published by the Free Software Foundation; either
++ version 2.1 of the License, or (at your option) any later version.
++
++ The GNU C Library is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ Lesser General Public License for more details.
++
++ You should have received a copy of the GNU Lesser General Public
++ License along with the GNU C Library; if not, see
++ <http://www.gnu.org/licenses/>. */
++
++#include <sysdep.h>
++#include <math_ldbl_opt.h>
++
++#undef weak_alias
++#define weak_alias(name, alias)
++#undef strong_alias
++#define strong_alias(name, alias)
++#undef compat_symbol
++#define compat_symbol(lib, name, alias, ver)
++
++#define __llround __llround_power8
++
++#include <sysdeps/powerpc/powerpc64/power8/fpu/s_llround.S>
+diff --git a/sysdeps/powerpc/powerpc64/fpu/multiarch/s_llround.c b/sysdeps/powerpc/powerpc64/fpu/multiarch/s_llround.c
+index a4d1bf3..7dba17e 100644
+--- a/sysdeps/powerpc/powerpc64/fpu/multiarch/s_llround.c
++++ b/sysdeps/powerpc/powerpc64/fpu/multiarch/s_llround.c
+@@ -27,12 +27,15 @@
+ extern __typeof (__llround) __llround_ppc64 attribute_hidden;
+ extern __typeof (__llround) __llround_power5plus attribute_hidden;
+ extern __typeof (__llround) __llround_power6x attribute_hidden;
++extern __typeof (__llround) __llround_power8 attribute_hidden;
+
+ libc_ifunc (__llround,
+- (hwcap & PPC_FEATURE_POWER6_EXT)
+- ? __llround_power6x :
+- (hwcap & PPC_FEATURE_POWER5_PLUS)
+- ? __llround_power5plus
++ (hwcap2 & PPC_FEATURE2_ARCH_2_07)
++ ? __llround_power8 :
++ (hwcap & PPC_FEATURE_POWER6_EXT)
++ ? __llround_power6x :
++ (hwcap & PPC_FEATURE_POWER5_PLUS)
++ ? __llround_power5plus
+ : __llround_ppc64);
+
+ weak_alias (__llround, llround)
+diff --git a/sysdeps/powerpc/powerpc64/fpu/s_ceill.S b/sysdeps/powerpc/powerpc64/fpu/s_ceill.S
+deleted file mode 100644
+index 42a73af..0000000
+--- a/sysdeps/powerpc/powerpc64/fpu/s_ceill.S
++++ /dev/null
+@@ -1,132 +0,0 @@
+-/* s_ceill.S IBM extended format long double version.
+- Copyright (C) 2004-2014 Free Software Foundation, Inc.
+- This file is part of the GNU C Library.
+-
+- The GNU C Library is free software; you can redistribute it and/or
+- modify it under the terms of the GNU Lesser General Public
+- License as published by the Free Software Foundation; either
+- version 2.1 of the License, or (at your option) any later version.
+-
+- The GNU C Library is distributed in the hope that it will be useful,
+- but WITHOUT ANY WARRANTY; without even the implied warranty of
+- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+- Lesser General Public License for more details.
+-
+- You should have received a copy of the GNU Lesser General Public
+- License along with the GNU C Library; if not, see
+- <http://www.gnu.org/licenses/>. */
+-
+-#include <sysdep.h>
+-#include <math_ldbl_opt.h>
+-
+- .section ".toc","aw"
+-.LC0: /* 2**52 */
+- .tc FD_43300000_0[TC],0x4330000000000000
+-
+- .section ".text"
+-
+-/* long double [fp1,fp2] ceill (long double x [fp1,fp2])
+- IEEE 1003.1 ceil function.
+-
+- PowerPC64 long double uses the IBM extended format which is
+- represented two 64-floating point double values. The values are
+- non-overlapping giving an effective precision of 106 bits. The first
+- double contains the high order bits of mantissa and is always ceiled
+- to represent a normal ceiling of long double to double. Since the
+- long double value is sum of the high and low values, the low double
+- normally has the opposite sign to compensate for the this ceiling.
+-
+- For long double there are two cases:
+- 1) |x| < 2**52, all the integer bits are in the high double.
+- ceil the high double and set the low double to -0.0.
+- 2) |x| >= 2**52, ceiling involves both doubles.
+- See the comment before label .L2 for details.
+- */
+-
+-ENTRY (__ceill)
+- mffs fp11 /* Save current FPU rounding mode. */
+- lfd fp13,.LC0@toc(2)
+- fabs fp0,fp1
+- fabs fp9,fp2
+- fsub fp12,fp13,fp13 /* generate 0.0 */
+- fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO52) */
+- fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
+- bnl- cr7,.L2
+- mtfsfi 7,2 /* Set rounding mode toward +inf. */
+- fneg fp2,fp12
+- ble- cr6,.L1
+- fadd fp1,fp1,fp13 /* x+= TWO52; */
+- fsub fp1,fp1,fp13 /* x-= TWO52; */
+- fabs fp1,fp1 /* if (x == 0.0) */
+-.L0:
+- mtfsf 0x01,fp11 /* restore previous rounding mode. */
+- blr /* x = 0.0; */
+-.L1:
+- bge- cr6,.L0 /* if (x < 0.0) */
+- fsub fp1,fp1,fp13 /* x-= TWO52; */
+- fadd fp1,fp1,fp13 /* x+= TWO52; */
+- fcmpu cr5,fp1,fp12 /* if (x > 0.0) */
+- mtfsf 0x01,fp11 /* restore previous rounding mode. */
+- fnabs fp1,fp1 /* if (x == 0.0) */
+- blr /* x = -0.0; */
+-
+-/* The high double is > TWO52 so we need to round the low double and
+- perhaps the high double. In this case we have to round the low
+- double and handle any adjustment to the high double that may be
+- caused by rounding (up). This is complicated by the fact that the
+- high double may already be rounded and the low double may have the
+- opposite sign to compensate.This gets a bit tricky so we use the
+- following algorithm:
+-
+- tau = floor(x_high/TWO52);
+- x0 = x_high - tau;
+- x1 = x_low + tau;
+- r1 = rint(x1);
+- y_high = x0 + r1;
+- y_low = x0 - y_high + r1;
+- return y; */
+-.L2:
+- fcmpu cr7,fp9,fp13 /* if (|x_low| > TWO52) */
+- fcmpu cr0,fp9,fp12 /* || (|x_low| == 0.0) */
+- fcmpu cr5,fp2,fp12 /* if (x_low > 0.0) */
+- bgelr- cr7 /* return x; */
+- beqlr- cr0
+- mtfsfi 7,2 /* Set rounding mode toward +inf. */
+- fdiv fp8,fp1,fp13 /* x_high/TWO52 */
+-
+- bng- cr6,.L6 /* if (x > 0.0) */
+- fctidz fp0,fp8
+- fcfid fp8,fp0 /* tau = floor(x_high/TWO52); */
+- bng cr5,.L4 /* if (x_low > 0.0) */
+- fmr fp3,fp1
+- fmr fp4,fp2
+- b .L5
+-.L4: /* if (x_low < 0.0) */
+- fsub fp3,fp1,fp8 /* x0 = x_high - tau; */
+- fadd fp4,fp2,fp8 /* x1 = x_low + tau; */
+-.L5:
+- fadd fp5,fp4,fp13 /* r1 = r1 + TWO52; */
+- fsub fp5,fp5,fp13 /* r1 = r1 - TWO52; */
+- b .L9
+-.L6: /* if (x < 0.0) */
+- fctidz fp0,fp8
+- fcfid fp8,fp0 /* tau = floor(x_high/TWO52); */
+- bnl cr5,.L7 /* if (x_low < 0.0) */
+- fmr fp3,fp1
+- fmr fp4,fp2
+- b .L8
+-.L7: /* if (x_low > 0.0) */
+- fsub fp3,fp1,fp8 /* x0 = x_high - tau; */
+- fadd fp4,fp2,fp8 /* x1 = x_low + tau; */
+-.L8:
+- fsub fp5,fp4,fp13 /* r1-= TWO52; */
+- fadd fp5,fp5,fp13 /* r1+= TWO52; */
+-.L9:
+- mtfsf 0x01,fp11 /* restore previous rounding mode. */
+- fadd fp1,fp3,fp5 /* y_high = x0 + r1; */
+- fsub fp2,fp3,fp1 /* y_low = x0 - y_high + r1; */
+- fadd fp2,fp2,fp5
+- blr
+-END (__ceill)
+-
+-long_double_symbol (libm, __ceill, ceill)
+diff --git a/sysdeps/powerpc/powerpc64/fpu/s_copysign.S b/sysdeps/powerpc/powerpc64/fpu/s_copysign.S
+index 51681aa..49c793d 100644
+--- a/sysdeps/powerpc/powerpc64/fpu/s_copysign.S
++++ b/sysdeps/powerpc/powerpc64/fpu/s_copysign.S
+@@ -27,11 +27,11 @@ ENTRY(__copysign)
+ /* double [f1] copysign (double [f1] x, double [f2] y);
+ copysign(x,y) returns a value with the magnitude of x and
+ with the sign bit of y. */
+- stfd fp2,56(r1)
++ stfd fp2,-8(r1)
+ nop
+ nop
+ nop
+- ld r3,56(r1)
++ ld r3,-8(r1)
+ cmpdi r3,0
+ blt L(0)
+ fabs fp1,fp1
+diff --git a/sysdeps/powerpc/powerpc64/fpu/s_nearbyintl.S b/sysdeps/powerpc/powerpc64/fpu/s_nearbyintl.S
+deleted file mode 100644
+index acd95da..0000000
+--- a/sysdeps/powerpc/powerpc64/fpu/s_nearbyintl.S
++++ /dev/null
+@@ -1,113 +0,0 @@
+-/* nearbyint long double.
+- IBM extended format long double version.
+- Copyright (C) 2004-2014 Free Software Foundation, Inc.
+- This file is part of the GNU C Library.
+-
+- The GNU C Library is free software; you can redistribute it and/or
+- modify it under the terms of the GNU Lesser General Public
+- License as published by the Free Software Foundation; either
+- version 2.1 of the License, or (at your option) any later version.
+-
+- The GNU C Library is distributed in the hope that it will be useful,
+- but WITHOUT ANY WARRANTY; without even the implied warranty of
+- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+- Lesser General Public License for more details.
+-
+- You should have received a copy of the GNU Lesser General Public
+- License along with the GNU C Library; if not, see
+- <http://www.gnu.org/licenses/>. */
+-
+-#include <sysdep.h>
+-#include <math_ldbl_opt.h>
+-
+- .section ".toc","aw"
+-.LC0: /* 2**52 */
+- .tc FD_43300000_0[TC],0x4330000000000000
+- .section ".text"
+-
+-/* long double [fp1,fp2] nearbyintl (long double x [fp1,fp2])
+- IEEE 1003.1 nearbyintl function. nearbyintl is similar to the rintl
+- but does raise the "inexact" exception. This implementation is
+- based on rintl but explicitly masks the inexact exception on entry
+- and clears any pending inexact before restoring the exception mask
+- on exit.
+-
+- PowerPC64 long double uses the IBM extended format which is
+- represented two 64-floating point double values. The values are
+- non-overlapping giving an effective precision of 106 bits. The first
+- double contains the high order bits of mantissa and is always rounded
+- to represent a normal rounding of long double to double. Since the
+- long double value is sum of the high and low values, the low double
+- normally has the opposite sign to compensate for the this rounding.
+-
+- For long double there are two cases:
+- 1) |x| < 2**52, all the integer bits are in the high double.
+- floor the high double and set the low double to -0.0.
+- 2) |x| >= 2**52, Rounding involves both doubles.
+- See the comment before label .L2 for details.
+- */
+-ENTRY (__nearbyintl)
+- mffs fp11 /* Save current FPSCR. */
+- lfd fp13,.LC0@toc(2)
+- fabs fp0,fp1
+- mtfsb0 28 /* Disable "inexact" exceptions. */
+- fsub fp12,fp13,fp13 /* generate 0.0 */
+- fabs fp9,fp2
+- fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO52) */
+- fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
+- bnl- cr7,.L2
+- fmr fp2,fp12
+- bng- cr6,.L4
+- fadd fp1,fp1,fp13 /* x+= TWO52; */
+- fsub fp1,fp1,fp13 /* x-= TWO52; */
+- b .L9
+-.L4:
+- bnl- cr6,.L9 /* if (x < 0.0) */
+- fsub fp1,fp13,fp1 /* x = TWO52 - x; */
+- fsub fp0,fp1,fp13 /* x = - (x - TWO52); */
+- fneg fp1,fp0
+-.L9:
+- mtfsb0 6 /* Clear any pending "inexact" exceptions. */
+- mtfsf 0x01,fp11 /* restore exception mask. */
+- blr
+-
+-/* The high double is > TWO52 so we need to round the low double and
+- perhaps the high double. This gets a bit tricky so we use the
+- following algorithm:
+-
+- tau = floor(x_high/TWO52);
+- x0 = x_high - tau;
+- x1 = x_low + tau;
+- r1 = nearbyint(x1);
+- y_high = x0 + r1;
+- y_low = r1 - tau;
+- return y; */
+-.L2:
+- fcmpu cr7,fp9,fp13 /* if (|x_low| > TWO52) */
+- fcmpu cr0,fp9,fp12 /* || (|x_low| == 0.0) */
+- bge- cr7,.L9 /* return x; */
+- beq- cr0,.L9
+- fdiv fp8,fp1,fp13 /* x_high/TWO52 */
+- fctidz fp0,fp8
+- fcfid fp8,fp0 /* tau = floor(x_high/TWO52); */
+- fsub fp3,fp1,fp8 /* x0 = x_high - tau; */
+- fadd fp4,fp2,fp8 /* x1 = x_low + tau; */
+-
+- fcmpu cr6,fp4,fp12 /* if (x1 > 0.0) */
+- bng- cr6,.L8
+- fadd fp5,fp4,fp13 /* r1 = x1 + TWO52; */
+- fsub fp5,fp5,fp13 /* r1 = r1 - TWO52; */
+- b .L6
+-.L8:
+- fmr fp5,fp4
+- bge- cr6,.L6 /* if (x1 < 0.0) */
+- fsub fp5,fp13,fp4 /* r1 = TWO52 - x1; */
+- fsub fp0,fp5,fp13 /* r1 = - (r1 - TWO52); */
+- fneg fp5,fp0
+-.L6:
+- fadd fp1,fp3,fp5 /* y_high = x0 + r1; */
+- fsub fp2,fp5,fp8 /* y_low = r1 - tau; */
+- b .L9
+-END (__nearbyintl)
+-
+-long_double_symbol (libm, __nearbyintl, nearbyintl)
+diff --git a/sysdeps/powerpc/powerpc64/fpu/s_roundl.S b/sysdeps/powerpc/powerpc64/fpu/s_roundl.S
+deleted file mode 100644
+index 5362da8..0000000
+--- a/sysdeps/powerpc/powerpc64/fpu/s_roundl.S
++++ /dev/null
+@@ -1,132 +0,0 @@
+-/* long double round function.
+- IBM extended format long double version.
+- Copyright (C) 2004-2014 Free Software Foundation, Inc.
+- This file is part of the GNU C Library.
+-
+- The GNU C Library is free software; you can redistribute it and/or
+- modify it under the terms of the GNU Lesser General Public
+- License as published by the Free Software Foundation; either
+- version 2.1 of the License, or (at your option) any later version.
+-
+- The GNU C Library is distributed in the hope that it will be useful,
+- but WITHOUT ANY WARRANTY; without even the implied warranty of
+- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+- Lesser General Public License for more details.
+-
+- You should have received a copy of the GNU Lesser General Public
+- License along with the GNU C Library; if not, see
+- <http://www.gnu.org/licenses/>. */
+-
+-#include <sysdep.h>
+-#include <math_ldbl_opt.h>
+-
+- .section ".toc","aw"
+-.LC0: /* 2**52 */
+- .tc FD_43300000_0[TC],0x4330000000000000
+-.LC1: /* 0.5 */
+- .tc FD_3fe00000_0[TC],0x3fe0000000000000
+- .section ".text"
+-
+-/* long double [fp1,fp2] roundl (long double x [fp1,fp2])
+- IEEE 1003.1 round function. IEEE specifies "round to the nearest
+- integer value, rounding halfway cases away from zero, regardless of
+- the current rounding mode." However PowerPC Architecture defines
+- "Round to Nearest" as "Choose the best approximation. In case of a
+- tie, choose the one that is even (least significant bit o).".
+- So we can't use the PowerPC "Round to Nearest" mode. Instead we set
+- "Round toward Zero" mode and round by adding +-0.5 before rounding
+- to the integer value. */
+-
+-ENTRY (__roundl)
+- mffs fp11 /* Save current FPU rounding mode. */
+- lfd fp13,.LC0@toc(2)
+- fabs fp0,fp1
+- fabs fp9,fp2
+- fsub fp12,fp13,fp13 /* generate 0.0 */
+- fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO52) */
+- fcmpu cr6,fp1,fp12 /* if (x > 0.0) */
+- bnl- cr7,.L2
+- mtfsfi 7,1 /* Set rounding mode toward 0. */
+- lfd fp10,.LC1@toc(2)
+- ble- cr6,.L1
+- fneg fp2,fp12
+- fadd fp1,fp1,fp10 /* x+= 0.5; */
+- fadd fp1,fp1,fp13 /* x+= TWO52; */
+- fsub fp1,fp1,fp13 /* x-= TWO52; */
+- fabs fp1,fp1 /* if (x == 0.0) x = 0.0; */
+-.L0:
+- mtfsf 0x01,fp11 /* restore previous rounding mode. */
+- blr
+-.L1:
+- fsub fp9,fp1,fp10 /* x-= 0.5; */
+- fneg fp2,fp12
+- bge- cr6,.L0 /* if (x < 0.0) */
+- fsub fp1,fp9,fp13 /* x-= TWO52; */
+- fadd fp1,fp1,fp13 /* x+= TWO52; */
+- fnabs fp1,fp1 /* if (x == 0.0) x = -0.0; */
+- mtfsf 0x01,fp11 /* restore previous rounding mode. */
+- blr
+-
+-/* The high double is > TWO52 so we need to round the low double and
+- perhaps the high double. In this case we have to round the low
+- double and handle any adjustment to the high double that may be
+- caused by rounding (up). This is complicated by the fact that the
+- high double may already be rounded and the low double may have the
+- opposite sign to compensate.This gets a bit tricky so we use the
+- following algorithm:
+-
+- tau = floor(x_high/TWO52);
+- x0 = x_high - tau;
+- x1 = x_low + tau;
+- r1 = rint(x1);
+- y_high = x0 + r1;
+- y_low = x0 - y_high + r1;
+- return y; */
+-.L2:
+- fcmpu cr7,fp9,fp13 /* if (|x_low| > TWO52) */
+- fcmpu cr0,fp9,fp12 /* || (|x_low| == 0.0) */
+- fcmpu cr5,fp2,fp12 /* if (x_low > 0.0) */
+- lfd fp10,.LC1@toc(2)
+- bgelr- cr7 /* return x; */
+- beqlr- cr0
+- mtfsfi 7,1 /* Set rounding mode toward 0. */
+- fdiv fp8,fp1,fp13 /* x_high/TWO52 */
+-
+- bng- cr6,.L6 /* if (x > 0.0) */
+- fctidz fp0,fp8
+- fcfid fp8,fp0 /* tau = floor(x_high/TWO52); */
+- bng cr5,.L4 /* if (x_low > 0.0) */
+- fmr fp3,fp1
+- fmr fp4,fp2
+- b .L5
+-.L4: /* if (x_low < 0.0) */
+- fsub fp3,fp1,fp8 /* x0 = x_high - tau; */
+- fadd fp4,fp2,fp8 /* x1 = x_low + tau; */
+-.L5:
+- fadd fp5,fp4,fp10 /* r1 = x1 + 0.5; */
+- fadd fp5,fp5,fp13 /* r1 = r1 + TWO52; */
+- fsub fp5,fp5,fp13 /* r1 = r1 - TWO52; */
+- b .L9
+-.L6: /* if (x < 0.0) */
+- fctidz fp0,fp8
+- fcfid fp8,fp0 /* tau = floor(x_high/TWO52); */
+- bnl cr5,.L7 /* if (x_low < 0.0) */
+- fmr fp3,fp1
+- fmr fp4,fp2
+- b .L8
+-.L7: /* if (x_low > 0.0) */
+- fsub fp3,fp1,fp8 /* x0 = x_high - tau; */
+- fadd fp4,fp2,fp8 /* x1 = x_low + tau; */
+-.L8:
+- fsub fp5,fp4,fp10 /* r1 = x1 - 0.5; */
+- fsub fp5,fp5,fp13 /* r1-= TWO52; */
+- fadd fp5,fp5,fp13 /* r1+= TWO52; */
+-.L9:
+- mtfsf 0x01,fp11 /* restore previous rounding mode. */
+- fadd fp1,fp3,fp5 /* y_high = x0 + r1; */
+- fsub fp2,fp3,fp1 /* y_low = x0 - y_high + r1; */
+- fadd fp2,fp2,fp5
+- blr
+-END (__roundl)
+-
+-long_double_symbol (libm, __roundl, roundl)
+diff --git a/sysdeps/powerpc/powerpc64/multiarch/Makefile b/sysdeps/powerpc/powerpc64/multiarch/Makefile
+index 3c47316..8d367aa 100644
+--- a/sysdeps/powerpc/powerpc64/multiarch/Makefile
++++ b/sysdeps/powerpc/powerpc64/multiarch/Makefile
+@@ -13,7 +13,10 @@ sysdep_routines += memcpy-power7 memcpy-a2 memcpy-power6 memcpy-cell \
+ wcschr-power6 wcschr-ppc64 wcsrchr-power7 wcsrchr-power6 \
+ wcsrchr-ppc64 wcscpy-power7 wcscpy-power6 wcscpy-ppc64 \
+ wordcopy-power7 wordcopy-power6 wordcopy-ppc64 \
+- strcpy-power7 strcpy-ppc64 stpcpy-power7 stpcpy-ppc64
++ strcpy-power7 strcpy-ppc64 stpcpy-power7 stpcpy-ppc64 \
++ strrchr-power7 strrchr-ppc64 strncat-power7 strncat-ppc64 \
++ strspn-power7 strspn-ppc64 strcspn-power7 strcspn-ppc64 \
++ strpbrk-power7 strpbrk-ppc64
+
+ CFLAGS-strncase-power7.c += -mcpu=power7 -funroll-loops
+ CFLAGS-strncase_l-power7.c += -mcpu=power7 -funroll-loops
+diff --git a/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c b/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c
+index 6bbdd4e..91fabb0 100644
+--- a/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c
++++ b/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c
+@@ -238,5 +238,45 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
+ IFUNC_IMPL_ADD (array, i, wcscpy, 1,
+ __wcscpy_ppc))
+
++ /* Support sysdeps/powerpc/powerpc64/multiarch/strrchr.c. */
++ IFUNC_IMPL (i, name, strrchr,
++ IFUNC_IMPL_ADD (array, i, strrchr,
++ hwcap & PPC_FEATURE_HAS_VSX,
++ __strrchr_power7)
++ IFUNC_IMPL_ADD (array, i, strrchr, 1,
++ __strrchr_ppc))
++
++ /* Support sysdeps/powerpc/powerpc64/multiarch/strncat.c. */
++ IFUNC_IMPL (i, name, strncat,
++ IFUNC_IMPL_ADD (array, i, strncat,
++ hwcap & PPC_FEATURE_HAS_VSX,
++ __strncat_power7)
++ IFUNC_IMPL_ADD (array, i, strncat, 1,
++ __strncat_ppc))
++
++ /* Support sysdeps/powerpc/powerpc64/multiarch/strspn.c. */
++ IFUNC_IMPL (i, name, strspn,
++ IFUNC_IMPL_ADD (array, i, strspn,
++ hwcap & PPC_FEATURE_HAS_VSX,
++ __strspn_power7)
++ IFUNC_IMPL_ADD (array, i, strspn, 1,
++ __strspn_ppc))
++
++ /* Support sysdeps/powerpc/powerpc64/multiarch/strcspn.c. */
++ IFUNC_IMPL (i, name, strcspn,
++ IFUNC_IMPL_ADD (array, i, strcspn,
++ hwcap & PPC_FEATURE_HAS_VSX,
++ __strcspn_power7)
++ IFUNC_IMPL_ADD (array, i, strcspn, 1,
++ __strcspn_ppc))
++
++ /* Support sysdeps/powerpc/powerpc64/multiarch/strpbrk.c. */
++ IFUNC_IMPL (i, name, strpbrk,
++ IFUNC_IMPL_ADD (array, i, strpbrk,
++ hwcap & PPC_FEATURE_HAS_VSX,
++ __strpbrk_power7)
++ IFUNC_IMPL_ADD (array, i, strpbrk, 1,
++ __strpbrk_ppc))
++
+ return i;
+ }
+diff --git a/sysdeps/powerpc/powerpc64/multiarch/memset-ppc64.S b/sysdeps/powerpc/powerpc64/multiarch/memset-ppc64.S
+index 5b234d9e..65b3afe 100644
+--- a/sysdeps/powerpc/powerpc64/multiarch/memset-ppc64.S
++++ b/sysdeps/powerpc/powerpc64/multiarch/memset-ppc64.S
+@@ -18,10 +18,9 @@
+
+ #include <sysdep.h>
+
+-#if defined SHARED && !defined NOT_IN_libc
+-
+ /* Copied from bzero.S to prevent the linker from inserting a stub
+- between bzero and memset. */
++ between bzero and memset. NOTE: this code should be positioned
++ before ENTRY/END_GEN_TB redefinition. */
+ ENTRY (__bzero_ppc)
+ CALL_MCOUNT 3
+ mr r5,r4
+@@ -29,6 +28,8 @@ ENTRY (__bzero_ppc)
+ b L(_memset)
+ END_GEN_TB (__bzero_ppc,TB_TOCLESS)
+
++
++#if defined SHARED && !defined NOT_IN_libc
+ # undef EALIGN
+ # define EALIGN(name, alignt, words) \
+ .section ".text"; \
+@@ -48,9 +49,9 @@ END_GEN_TB (__bzero_ppc,TB_TOCLESS)
+ # undef libc_hidden_builtin_def
+ # define libc_hidden_builtin_def(name) \
+ .globl __GI_memset; __GI_memset = __memset_ppc
++#endif
+
+ /* Do not implement __bzero at powerpc64/memset.S. */
+-# define NO_BZERO_IMPL
+-#endif
++#define NO_BZERO_IMPL
+
+ #include <sysdeps/powerpc/powerpc64/memset.S>
+diff --git a/sysdeps/powerpc/powerpc64/multiarch/strcspn-power7.S b/sysdeps/powerpc/powerpc64/multiarch/strcspn-power7.S
+new file mode 100644
+index 0000000..02ffcc8
+--- /dev/null
++++ b/sysdeps/powerpc/powerpc64/multiarch/strcspn-power7.S
+@@ -0,0 +1,40 @@
++/* Optimized strcspn implementation for POWER7.
++ Copyright (C) 2014 Free Software Foundation, Inc.
++ This file is part of the GNU C Library.
++
++ The GNU C Library is free software; you can redistribute it and/or
++ modify it under the terms of the GNU Lesser General Public
++ License as published by the Free Software Foundation; either
++ version 2.1 of the License, or (at your option) any later version.
++
++ The GNU C Library is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ Lesser General Public License for more details.
++
++ You should have received a copy of the GNU Lesser General Public
++ License along with the GNU C Library; if not, see
++ <http://www.gnu.org/licenses/>. */
++
++#include <sysdep.h>
++
++#undef EALIGN
++#define EALIGN(name, alignt, words) \
++ .section ".text"; \
++ ENTRY_2(__strcspn_power7) \
++ .align ALIGNARG(alignt); \
++ EALIGN_W_##words; \
++ BODY_LABEL(__strcspn_power7): \
++ cfi_startproc; \
++ LOCALENTRY(__strcspn_power7)
++
++#undef END
++#define END(name) \
++ cfi_endproc; \
++ TRACEBACK(__strcspn_power7) \
++ END_2(__strcspn_power7)
++
++#undef libc_hidden_builtin_def
++#define libc_hidden_builtin_def(name)
++
++#include <sysdeps/powerpc/powerpc64/power7/strcspn.S>
+diff --git a/sysdeps/powerpc/powerpc64/multiarch/strcspn-ppc64.c b/sysdeps/powerpc/powerpc64/multiarch/strcspn-ppc64.c
+new file mode 100644
+index 0000000..5f8b610
+--- /dev/null
++++ b/sysdeps/powerpc/powerpc64/multiarch/strcspn-ppc64.c
+@@ -0,0 +1,30 @@
++/* Copyright (C) 2014 Free Software Foundation, Inc.
++ This file is part of the GNU C Library.
++
++ The GNU C Library is free software; you can redistribute it and/or
++ modify it under the terms of the GNU Lesser General Public
++ License as published by the Free Software Foundation; either
++ version 2.1 of the License, or (at your option) any later version.
++
++ The GNU C Library is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ Lesser General Public License for more details.
++
++ You should have received a copy of the GNU Lesser General Public
++ License along with the GNU C Library; if not, see
++ <http://www.gnu.org/licenses/>. */
++
++#include <string.h>
++
++#define STRCSPN __strcspn_ppc
++#ifdef SHARED
++
++# undef libc_hidden_builtin_def
++# define libc_hidden_builtin_def(name) \
++ __hidden_ver1 (__strcspn_ppc, __GI_strcspn, __strcspn_ppc);
++#endif
++
++extern __typeof (strcspn) __strcspn_ppc attribute_hidden;
++
++#include <string/strcspn.c>
+diff --git a/sysdeps/powerpc/powerpc64/multiarch/strcspn.c b/sysdeps/powerpc/powerpc64/multiarch/strcspn.c
+new file mode 100644
+index 0000000..3609d93
+--- /dev/null
++++ b/sysdeps/powerpc/powerpc64/multiarch/strcspn.c
+@@ -0,0 +1,31 @@
++/* Multiple versions of strcspn. PowerPC64 version.
++ Copyright (C) 2014 Free Software Foundation, Inc.
++ This file is part of the GNU C Library.
++
++ The GNU C Library is free software; you can redistribute it and/or
++ modify it under the terms of the GNU Lesser General Public
++ License as published by the Free Software Foundation; either
++ version 2.1 of the License, or (at your option) any later version.
++
++ The GNU C Library is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ Lesser General Public License for more details.
++
++ You should have received a copy of the GNU Lesser General Public
++ License along with the GNU C Library; if not, see
++ <http://www.gnu.org/licenses/>. */
++
++#ifndef NOT_IN_libc
++# include <string.h>
++# include <shlib-compat.h>
++# include "init-arch.h"
++
++extern __typeof (strcspn) __strcspn_ppc attribute_hidden;
++extern __typeof (strcspn) __strcspn_power7 attribute_hidden;
++
++libc_ifunc (strcspn,
++ (hwcap & PPC_FEATURE_HAS_VSX)
++ ? __strcspn_power7
++ : __strcspn_ppc);
++#endif
+diff --git a/sysdeps/powerpc/powerpc64/multiarch/strncat-power7.S b/sysdeps/powerpc/powerpc64/multiarch/strncat-power7.S
+new file mode 100644
+index 0000000..ead4a9a
+--- /dev/null
++++ b/sysdeps/powerpc/powerpc64/multiarch/strncat-power7.S
+@@ -0,0 +1,42 @@
++/* Optimized strncat implementation for POWER7.
++ Copyright (C) 2014 Free Software Foundation, Inc.
++ This file is part of the GNU C Library.
++
++ The GNU C Library is free software; you can redistribute it and/or
++ modify it under the terms of the GNU Lesser General Public
++ License as published by the Free Software Foundation; either
++ version 2.1 of the License, or (at your option) any later version.
++
++ The GNU C Library is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ Lesser General Public License for more details.
++
++ You should have received a copy of the GNU Lesser General Public
++ License along with the GNU C Library; if not, see
++ <http://www.gnu.org/licenses/>. */
++
++#include <sysdep.h>
++
++#undef EALIGN
++#define EALIGN(name, alignt, words) \
++ .section ".text"; \
++ ENTRY_2(__strncat_power7) \
++ .align ALIGNARG(alignt); \
++ EALIGN_W_##words; \
++ BODY_LABEL(__strncat_power7): \
++ cfi_startproc; \
++ LOCALENTRY(__strncat_power7)
++
++#undef END
++#define END(name) \
++ cfi_endproc; \
++ TRACEBACK(__strncat_power7) \
++ END_2(__strncat_power7)
++
++#undef libc_hidden_builtin_def
++#define libc_hidden_builtin_def(name)
++
++#define STRLEN __strlen_power7
++
++#include <sysdeps/powerpc/powerpc64/power7/strncat.S>
+diff --git a/sysdeps/powerpc/powerpc64/multiarch/strncat-ppc64.c b/sysdeps/powerpc/powerpc64/multiarch/strncat-ppc64.c
+new file mode 100644
+index 0000000..3058c0a
+--- /dev/null
++++ b/sysdeps/powerpc/powerpc64/multiarch/strncat-ppc64.c
+@@ -0,0 +1,29 @@
++/* Copyright (C) 2014 Free Software Foundation, Inc.
++ This file is part of the GNU C Library.
++
++ The GNU C Library is free software; you can redistribute it and/or
++ modify it under the terms of the GNU Lesser General Public
++ License as published by the Free Software Foundation; either
++ version 2.1 of the License, or (at your option) any later version.
++
++ The GNU C Library is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ Lesser General Public License for more details.
++
++ You should have received a copy of the GNU Lesser General Public
++ License along with the GNU C Library; if not, see
++ <http://www.gnu.org/licenses/ >. */
++
++#include <string.h>
++
++#define STRNCAT __strncat_ppc
++#ifdef SHARED
++# undef libc_hidden_builtin_def
++# define libc_hidden_builtin_def(name) \
++ __hidden_ver1 (__strncat_ppc, __GI_strncat, __strncat_ppc);
++#endif
++
++extern __typeof (strncat) __strncat_ppc attribute_hidden;
++
++#include <string/strncat.c>
+diff --git a/sysdeps/powerpc/powerpc64/multiarch/strncat.c b/sysdeps/powerpc/powerpc64/multiarch/strncat.c
+new file mode 100644
+index 0000000..db98ec1
+--- /dev/null
++++ b/sysdeps/powerpc/powerpc64/multiarch/strncat.c
+@@ -0,0 +1,31 @@
++/* Multiple versions of strncat. PowerPC64 version.
++ Copyright (C) 2014 Free Software Foundation, Inc.
++ This file is part of the GNU C Library.
++
++ The GNU C Library is free software; you can redistribute it and/or
++ modify it under the terms of the GNU Lesser General Public
++ License as published by the Free Software Foundation; either
++ version 2.1 of the License, or (at your option) any later version.
++
++ The GNU C Library is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ Lesser General Public License for more details.
++
++ You should have received a copy of the GNU Lesser General Public
++ License along with the GNU C Library; if not, see
++ <http://www.gnu.org/licenses/>. */
++
++#ifndef NOT_IN_libc
++# include <string.h>
++# include <shlib-compat.h>
++# include "init-arch.h"
++
++extern __typeof (strncat) __strncat_ppc attribute_hidden;
++extern __typeof (strncat) __strncat_power7 attribute_hidden;
++
++libc_ifunc (strncat,
++ (hwcap & PPC_FEATURE_HAS_VSX)
++ ? __strncat_power7
++ : __strncat_ppc);
++#endif
+diff --git a/sysdeps/powerpc/powerpc64/multiarch/strpbrk-power7.S b/sysdeps/powerpc/powerpc64/multiarch/strpbrk-power7.S
+new file mode 100644
+index 0000000..663ca36
+--- /dev/null
++++ b/sysdeps/powerpc/powerpc64/multiarch/strpbrk-power7.S
+@@ -0,0 +1,40 @@
++/* Optimized strpbrk implementation for POWER7.
++ Copyright (C) 2014 Free Software Foundation, Inc.
++ This file is part of the GNU C Library.
++
++ The GNU C Library is free software; you can redistribute it and/or
++ modify it under the terms of the GNU Lesser General Public
++ License as published by the Free Software Foundation; either
++ version 2.1 of the License, or (at your option) any later version.
++
++ The GNU C Library is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ Lesser General Public License for more details.
++
++ You should have received a copy of the GNU Lesser General Public
++ License along with the GNU C Library; if not, see
++ <http://www.gnu.org/licenses/>. */
++
++#include <sysdep.h>
++
++#undef EALIGN
++#define EALIGN(name, alignt, words) \
++ .section ".text"; \
++ ENTRY_2(__strpbrk_power7) \
++ .align ALIGNARG(alignt); \
++ EALIGN_W_##words; \
++ BODY_LABEL(__strpbrk_power7): \
++ cfi_startproc; \
++ LOCALENTRY(__strpbrk_power7)
++
++#undef END
++#define END(name) \
++ cfi_endproc; \
++ TRACEBACK(__strpbrk_power7) \
++ END_2(__strpbrk_power7)
++
++#undef libc_hidden_builtin_def
++#define libc_hidden_builtin_def(name)
++
++#include <sysdeps/powerpc/powerpc64/power7/strpbrk.S>
+diff --git a/sysdeps/powerpc/powerpc64/multiarch/strpbrk-ppc64.c b/sysdeps/powerpc/powerpc64/multiarch/strpbrk-ppc64.c
+new file mode 100644
+index 0000000..8dea70e
+--- /dev/null
++++ b/sysdeps/powerpc/powerpc64/multiarch/strpbrk-ppc64.c
+@@ -0,0 +1,30 @@
++/* Copyright (C) 2014 Free Software Foundation, Inc.
++ This file is part of the GNU C Library.
++
++ The GNU C Library is free software; you can redistribute it and/or
++ modify it under the terms of the GNU Lesser General Public
++ License as published by the Free Software Foundation; either
++ version 2.1 of the License, or (at your option) any later version.
++
++ The GNU C Library is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ Lesser General Public License for more details.
++
++ You should have received a copy of the GNU Lesser General Public
++ License along with the GNU C Library; if not, see
++ <http://www.gnu.org/licenses/>. */
++
++#include <string.h>
++
++#define STRPBRK __strpbrk_ppc
++#ifdef SHARED
++
++# undef libc_hidden_builtin_def
++# define libc_hidden_builtin_def(name) \
++ __hidden_ver1 (__strpbrk_ppc, __GI_strpbrk, __strpbrk_ppc);
++#endif
++
++extern __typeof (strpbrk) __strpbrk_ppc attribute_hidden;
++
++#include <string/strpbrk.c>
+diff --git a/sysdeps/powerpc/powerpc64/multiarch/strpbrk.c b/sysdeps/powerpc/powerpc64/multiarch/strpbrk.c
+new file mode 100644
+index 0000000..8b05536
+--- /dev/null
++++ b/sysdeps/powerpc/powerpc64/multiarch/strpbrk.c
+@@ -0,0 +1,31 @@
++/* Multiple versions of strpbrk. PowerPC64 version.
++ Copyright (C) 2014 Free Software Foundation, Inc.
++ This file is part of the GNU C Library.
++
++ The GNU C Library is free software; you can redistribute it and/or
++ modify it under the terms of the GNU Lesser General Public
++ License as published by the Free Software Foundation; either
++ version 2.1 of the License, or (at your option) any later version.
++
++ The GNU C Library is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ Lesser General Public License for more details.
++
++ You should have received a copy of the GNU Lesser General Public
++ License along with the GNU C Library; if not, see
++ <http://www.gnu.org/licenses/>. */
++
++#ifndef NOT_IN_libc
++# include <string.h>
++# include <shlib-compat.h>
++# include "init-arch.h"
++
++extern __typeof (strpbrk) __strpbrk_ppc attribute_hidden;
++extern __typeof (strpbrk) __strpbrk_power7 attribute_hidden;
++
++libc_ifunc (strpbrk,
++ (hwcap & PPC_FEATURE_HAS_VSX)
++ ? __strpbrk_power7
++ : __strpbrk_ppc);
++#endif
+diff --git a/sysdeps/powerpc/powerpc64/multiarch/strrchr-power7.S b/sysdeps/powerpc/powerpc64/multiarch/strrchr-power7.S
+new file mode 100644
+index 0000000..78e15e3
+--- /dev/null
++++ b/sysdeps/powerpc/powerpc64/multiarch/strrchr-power7.S
+@@ -0,0 +1,39 @@
++/* Optimized strrchr implementation for POWER7.
++ Copyright (C) 2014 Free Software Foundation, Inc.
++ This file is part of the GNU C Library.
++
++ The GNU C Library is free software; you can redistribute it and/or
++ modify it under the terms of the GNU Lesser General Public
++ License as published by the Free Software Foundation; either
++ version 2.1 of the License, or (at your option) any later version.
++
++ The GNU C Library is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ Lesser General Public License for more details.
++
++ You should have received a copy of the GNU Lesser General Public
++ License along with the GNU C Library; if not, see
++ <http://www.gnu.org/licenses/>. */
++
++#include <sysdep.h>
++
++#undef ENTRY
++#define ENTRY(name) \
++ .section ".text"; \
++ ENTRY_2(__strrchr_power7) \
++ .align ALIGNARG(2); \
++ BODY_LABEL(__strrchr_power7): \
++ cfi_startproc; \
++ LOCALENTRY(__strrchr_power7)
++
++#undef END
++#define END(name) \
++ cfi_endproc; \
++ TRACEBACK(__strrchr_power7) \
++ END_2(__strrchr_power7)
++
++#undef libc_hidden_builtin_def
++#define libc_hidden_builtin_def(name)
++
++#include <sysdeps/powerpc/powerpc64/power7/strrchr.S>
+diff --git a/sysdeps/powerpc/powerpc64/multiarch/strrchr-ppc64.c b/sysdeps/powerpc/powerpc64/multiarch/strrchr-ppc64.c
+new file mode 100644
+index 0000000..5633a9f
+--- /dev/null
++++ b/sysdeps/powerpc/powerpc64/multiarch/strrchr-ppc64.c
+@@ -0,0 +1,33 @@
++/* Copyright (C) 2014 Free Software Foundation, Inc.
++ This file is part of the GNU C Library.
++
++ The GNU C Library is free software; you can redistribute it and/or
++ modify it under the terms of the GNU Lesser General Public
++ License as published by the Free Software Foundation; either
++ version 2.1 of the License, or (at your option) any later version.
++
++ The GNU C Library is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ Lesser General Public License for more details.
++
++ You should have received a copy of the GNU Lesser General Public
++ License along with the GNU C Library; if not, see
++ <http://www.gnu.org/licenses/>. */
++
++#include <string.h>
++
++#define STRRCHR __strrchr_ppc
++#undef weak_alias
++#define weak_alias(name, aliasname) \
++ extern __typeof (__strrchr_ppc) aliasname \
++ __attribute__ ((weak, alias ("__strrchr_ppc")));
++#if !defined(NOT_IN_libc) && defined(SHARED)
++# undef libc_hidden_builtin_def
++# define libc_hidden_builtin_def(name) \
++ __hidden_ver1(__strrchr_ppc, __GI_strrchr, __strrchr_ppc);
++#endif
++
++extern __typeof (strrchr) __strrchr_ppc attribute_hidden;
++
++#include <string/strrchr.c>
+diff --git a/sysdeps/powerpc/powerpc64/multiarch/strrchr.c b/sysdeps/powerpc/powerpc64/multiarch/strrchr.c
+new file mode 100644
+index 0000000..046162f
+--- /dev/null
++++ b/sysdeps/powerpc/powerpc64/multiarch/strrchr.c
+@@ -0,0 +1,35 @@
++/* Multiple versions of strrchr. PowerPC64 version.
++ Copyright (C) 2014 Free Software Foundation, Inc.
++ This file is part of the GNU C Library.
++
++ The GNU C Library is free software; you can redistribute it and/or
++ modify it under the terms of the GNU Lesser General Public
++ License as published by the Free Software Foundation; either
++ version 2.1 of the License, or (at your option) any later version.
++
++ The GNU C Library is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ Lesser General Public License for more details.
++
++ You should have received a copy of the GNU Lesser General Public
++ License along with the GNU C Library; if not, see
++ <http://www.gnu.org/licenses/>. */
++
++/* Define multiple versions only for definition in libc. */
++#ifndef NOT_IN_libc
++# include <string.h>
++# include <shlib-compat.h>
++# include "init-arch.h"
++
++extern __typeof (strrchr) __strrchr_ppc attribute_hidden;
++extern __typeof (strrchr) __strrchr_power7 attribute_hidden;
++
++/* Avoid DWARF definition DIE on ifunc symbol so that GDB can handle
++ ifunc symbol properly. */
++libc_ifunc (strrchr,
++ (hwcap & PPC_FEATURE_HAS_VSX)
++ ? __strrchr_power7
++ : __strrchr_ppc);
++weak_alias (strrchr, rindex)
++#endif
+diff --git a/sysdeps/powerpc/powerpc64/multiarch/strspn-power7.S b/sysdeps/powerpc/powerpc64/multiarch/strspn-power7.S
+new file mode 100644
+index 0000000..889dfee
+--- /dev/null
++++ b/sysdeps/powerpc/powerpc64/multiarch/strspn-power7.S
+@@ -0,0 +1,40 @@
++/* Optimized strspn implementation for POWER7.
++ Copyright (C) 2014 Free Software Foundation, Inc.
++ This file is part of the GNU C Library.
++
++ The GNU C Library is free software; you can redistribute it and/or
++ modify it under the terms of the GNU Lesser General Public
++ License as published by the Free Software Foundation; either
++ version 2.1 of the License, or (at your option) any later version.
++
++ The GNU C Library is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ Lesser General Public License for more details.
++
++ You should have received a copy of the GNU Lesser General Public
++ License along with the GNU C Library; if not, see
++ <http://www.gnu.org/licenses/>. */
++
++#include <sysdep.h>
++
++#undef EALIGN
++#define EALIGN(name, alignt, words) \
++ .section ".text"; \
++ ENTRY_2(__strspn_power7) \
++ .align ALIGNARG(alignt); \
++ EALIGN_W_##words; \
++ BODY_LABEL(__strspn_power7): \
++ cfi_startproc; \
++ LOCALENTRY(__strspn_power7)
++
++#undef END
++#define END(name) \
++ cfi_endproc; \
++ TRACEBACK(__strspn_power7) \
++ END_2(__strspn_power7)
++
++#undef libc_hidden_builtin_def
++#define libc_hidden_builtin_def(name)
++
++#include <sysdeps/powerpc/powerpc64/power7/strspn.S>
+diff --git a/sysdeps/powerpc/powerpc64/multiarch/strspn-ppc64.c b/sysdeps/powerpc/powerpc64/multiarch/strspn-ppc64.c
+new file mode 100644
+index 0000000..d543772
+--- /dev/null
++++ b/sysdeps/powerpc/powerpc64/multiarch/strspn-ppc64.c
+@@ -0,0 +1,33 @@
++/* Copyright (C) 2014 Free Software Foundation, Inc.
++ This file is part of the GNU C Library.
++
++ The GNU C Library is free software; you can redistribute it and/or
++ modify it under the terms of the GNU Lesser General Public
++ License as published by the Free Software Foundation; either
++ version 2.1 of the License, or (at your option) any later version.
++
++ The GNU C Library is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ Lesser General Public License for more details.
++
++ You should have received a copy of the GNU Lesser General Public
++ License along with the GNU C Library; if not, see
++ <http://www.gnu.org/licenses/>. */
++
++#include <string.h>
++
++#define STRSPN __strspn_ppc
++#undef weak_alias
++#define weak_alias(name, aliasname) \
++ extern __typeof (__strspn_ppc) aliasname \
++ __attribute__ ((weak, alias ("__strspn_ppc")));
++#if !defined(NOT_IN_libc) && defined(SHARED)
++# undef libc_hidden_builtin_def
++# define libc_hidden_builtin_def(name) \
++ __hidden_ver1(__strspn_ppc, __GI_strspn, __strspn_ppc);
++#endif
++
++extern __typeof (strspn) __strspn_ppc attribute_hidden;
++
++#include <string/strspn.c>
+diff --git a/sysdeps/powerpc/powerpc64/multiarch/strspn.c b/sysdeps/powerpc/powerpc64/multiarch/strspn.c
+new file mode 100644
+index 0000000..bf8c877
+--- /dev/null
++++ b/sysdeps/powerpc/powerpc64/multiarch/strspn.c
+@@ -0,0 +1,31 @@
++/* Multiple versions of strspn. PowerPC64 version.
++ Copyright (C) 2014 Free Software Foundation, Inc.
++ This file is part of the GNU C Library.
++
++ The GNU C Library is free software; you can redistribute it and/or
++ modify it under the terms of the GNU Lesser General Public
++ License as published by the Free Software Foundation; either
++ version 2.1 of the License, or (at your option) any later version.
++
++ The GNU C Library is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ Lesser General Public License for more details.
++
++ You should have received a copy of the GNU Lesser General Public
++ License along with the GNU C Library; if not, see
++ <http://www.gnu.org/licenses/>. */
++
++#ifndef NOT_IN_libc
++# include <string.h>
++# include <shlib-compat.h>
++# include "init-arch.h"
++
++extern __typeof (strspn) __strspn_ppc attribute_hidden;
++extern __typeof (strspn) __strspn_power7 attribute_hidden;
++
++libc_ifunc (strspn,
++ (hwcap & PPC_FEATURE_HAS_VSX)
++ ? __strspn_power7
++ : __strspn_ppc);
++#endif
+diff --git a/sysdeps/powerpc/powerpc64/power7/memrchr.S b/sysdeps/powerpc/powerpc64/power7/memrchr.S
+index 40e436f..0c01ca2 100644
+--- a/sysdeps/powerpc/powerpc64/power7/memrchr.S
++++ b/sysdeps/powerpc/powerpc64/power7/memrchr.S
+@@ -29,7 +29,7 @@ ENTRY (__memrchr)
+ mr r10,r3
+ clrrdi r6,r7,7
+ li r9,3<<5
+- dcbt r9,r6,16 /* Stream hint, decreasing addresses. */
++ dcbt r9,r6,8 /* Stream hint, decreasing addresses. */
+
+ /* Replicate BYTE to doubleword. */
+ insrdi r4,r4,8,48
+diff --git a/sysdeps/powerpc/powerpc64/power7/strcspn.S b/sysdeps/powerpc/powerpc64/power7/strcspn.S
+new file mode 100644
+index 0000000..3f6aa0a
+--- /dev/null
++++ b/sysdeps/powerpc/powerpc64/power7/strcspn.S
+@@ -0,0 +1,139 @@
++/* Optimized strcspn implementation for PowerPC64.
++ Copyright (C) 2014 Free Software Foundation, Inc.
++ This file is part of the GNU C Library.
++
++ The GNU C Library is free software; you can redistribute it and/or
++ modify it under the terms of the GNU Lesser General Public
++ License as published by the Free Software Foundation; either
++ version 2.1 of the License, or (at your option) any later version.
++
++ The GNU C Library is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ Lesser General Public License for more details.
++
++ You should have received a copy of the GNU Lesser General Public
++ License along with the GNU C Library; if not, see
++ <http://www.gnu.org/licenses/>. */
++
++#include <sysdep.h>
++
++/* size_t [r3] strcspn (const char [r4] *s, const char [r5] *reject) */
++
++ .machine power7
++EALIGN (strcspn, 4, 0)
++ CALL_MCOUNT 3
++
++ /* The idea to speed up the algorithm is to create a lookup table
++ for fast check if input character should be considered. For ASCII
++ or ISO-8859-X character sets it has 256 positions. */
++ lbz r10,0(r4)
++
++ /* First the table should be cleared and to avoid unaligned accesses
++ when using the VSX stores the table address is aligned to 16
++ bytes. */
++ xxlxor v0,v0,v0
++
++ /* PPC64 ELF ABI stack is aligned to 16 bytes. */
++ addi r9,r1,-256
++
++ li r8,48
++ li r5,16
++ li r6,32
++ cmpdi cr7,r10,0 /* reject[0] == '\0' ? */
++ addi r12,r9,64
++ /* Clear the table with 0 values */
++ stxvw4x v0,r0,r9
++ addi r11,r9,128
++ addi r7,r9,192
++ stxvw4x v0,r9,r5
++ stxvw4x v0,r9,r6
++ stxvw4x v0,r9,r8
++ stxvw4x v0,r0,r12
++ stxvw4x v0,r12,r5
++ stxvw4x v0,r12,r6
++ stxvw4x v0,r12,r8
++ stxvw4x v0,r0,r11
++ stxvw4x v0,r11,r5
++ stxvw4x v0,r11,r6
++ stxvw4x v0,r11,r8
++ stxvw4x v0,r0,r7
++ stxvw4x v0,r7,r5
++ stxvw4x v0,r7,r6
++ stxvw4x v0,r7,r8
++ li r8,1
++ beq cr7,L(finish_table) /* If reject[0] == '\0' skip */
++
++ /* Initialize the table as:
++ for (i=0; reject[i]; i++
++ table[reject[i]]] = 1 */
++ .p2align 4,,15
++L(init_table):
++ stbx r8,r9,r10
++ lbzu r10,1(r4)
++ cmpdi cr7,r10,0 /* If reject[0] == '\0' finish */
++ bne cr7,L(init_table)
++L(finish_table):
++ /* set table[0] = 1 */
++ li r10,1
++ stb r10,0(r9)
++ li r10,0
++ b L(mainloop)
++
++ /* Unrool the loop 4 times and check using the table as:
++ i = 0;
++ while (1)
++ {
++ if (table[input[i++]] == 1)
++ return i - 1;
++ if (table[input[i++]] == 1)
++ return i - 1;
++ if (table[input[i++]] == 1)
++ return i - 1;
++ if (table[input[i++]] == 1)
++ return i - 1;
++ } */
++ .p2align 4,,15
++L(unroll):
++ lbz r8,1(r3)
++ addi r10,r10,4
++ lbzx r8,r9,r8
++ cmpwi r7,r8,1
++ beq cr7,L(end)
++ lbz r8,2(r3)
++ addi r3,r3,4
++ lbzx r8,r9,r8
++ cmpwi cr7,r8,1
++ beq cr7,L(end2)
++ lbz r8,3(r7)
++ lbzx r8,r9,r8
++ cmpwi cr7,r8,1
++ beq cr7,L(end3)
++L(mainloop):
++ lbz r8,0(r3)
++ mr r7,r3
++ addi r6,r10,1
++ addi r4,r10,2
++ addi r5,r10,3
++ lbzx r8,r9,8
++ cmpwi cr7,r8,1
++ bne cr7,L(unroll)
++ mr r3,r10
++ blr
++
++ .p2align 4,,15
++L(end):
++ mr r3,r6
++ blr
++
++ .p2align 4,,15
++L(end2):
++ mr r3,r4
++ blr
++
++ .p2align 4,,15
++L(end3):
++ mr r3,r5
++ blr
++END (strcspn)
++libc_hidden_builtin_def (strcspn)
+diff --git a/sysdeps/powerpc/powerpc64/power7/strncat.S b/sysdeps/powerpc/powerpc64/power7/strncat.S
+new file mode 100644
+index 0000000..1a1a95e
+--- /dev/null
++++ b/sysdeps/powerpc/powerpc64/power7/strncat.S
+@@ -0,0 +1,222 @@
++/* Optimized strncat implementation for PowerPC64/POWER7.
++
++ Copyright (C) 2014 Free Software Foundation, Inc.
++ This file is part of the GNU C Library.
++
++ The GNU C Library is free software; you can redistribute it and/or
++ modify it under the terms of the GNU Lesser General Public
++ License as published by the Free Software Foundation; either
++ version 2.1 of the License, or (at your option) any later version.
++
++ The GNU C Library is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ Lesser General Public License for more details.
++
++ You should have received a copy of the GNU Lesser General Public
++ License along with the GNU C Library; if not, see
++ <http://www.gnu.org/licenses/>. */
++
++/* The algorithm is as follows for aligned memory access :
++
++ if address of s2 is divisible by 0x7UL,
++ perform aligned doubleword catenation
++ else
++ perform unaligned catenation
++
++ The aligned comparison are made using cmpb instructions. */
++
++/* char* [r3] strncat (const char *s1 [r3],
++ const char *s2 [r4],
++ size_t size [r5]) */
++
++#include <sysdep.h>
++
++#ifndef STRNCAT
++# undef strncat
++# define STRNCAT strncat
++#endif
++
++#ifndef STRLEN
++# define STRLEN __strlen_ppc
++#endif
++
++#define FRAMESIZE (FRAME_MIN_SIZE+32)
++
++ .machine power7
++EALIGN(STRNCAT, 4, 0)
++ CALL_MCOUNT 3
++
++ mflr r0 /* Load link register LR to r0. */
++
++/* We shall use r29, r30 and r31 non volatile register for retention.
++ Save all the callee registers in the GPR save area. */
++ std r29, -24(r1) /* Save callers register r29. */
++ std r30, -16(r1) /* Save callers register r30. */
++ std r31, -8(r1) /* Save callers register r31. */
++
++ std r0, 16(r1) /* Store the link register. */
++ stdu r1, -FRAMESIZE(r1) /* Create the stack frame. */
++
++/* Improve performance with CPU pre-fetch. */
++ dcbt 0, r3 /* Pre-fetch str to avoid cache
++ miss. */
++ dcbt 0, r4 /* Pre-fetch accept to avoid cache
++ miss. */
++
++ mr. r29, r5 /* Save "n" in r29. */
++ mr r30, r3 /* Save "s1" in r30 from r3. */
++ beq cr0,L(done)
++
++ mr r31, r4 /* Save "s2" in r31 from r4. */
++ bl STRLEN /* Call optimized strlen on s1; goto
++ end of s1. */
++ nop
++ cmpldi cr7, r29, 7 /* If s2 is <=7 process
++ byte-by-byte. */
++ add r3, r30, r3 /* Grab the last character of s1. */
++ bgt cr7,L(alignment) /* Process by aligned strings. */
++
++ cmpldi cr7, r29, 3 /* If n is >= 4, we can
++ byte-unroll. */
++ addi r9, r3, -1 /* Make "s1" point before next
++ character, increment when read. */
++ bgt cr7, L(bytes_unroll) /* Process each byte. */
++
++L(byte_by_byte):
++ lbz r10, 0(r31)
++ addi r8, r9, 1
++ cmpdi cr7, r10, 0 /* Check for NULL in "s2". */
++ stb r10, 1(r9)
++ beq cr7, L(done)
++ add r9, r9, r29
++ subf r9, r8, r9
++ addi r9, r9, 1
++ mtctr r9
++ b L(branch2)
++ .p2align 4
++L(branch1):
++ lbzu r10, 1(r31)
++ cmpdi cr7, r10, 0
++ stbu r10, 1(r8)
++ beq cr7,L(done)
++L(branch2):
++ mr r9, r8
++ bdnz L(branch1)
++ beq cr7,L(done)
++L(nullTerminate):
++ li r10, 0 /* Load NULL for termination. */
++ stb r10, 1(r9) /* Append or terminate s1 with
++ NULL. */
++ .p2align 4 /* A small section here. */
++L(done): /* We return now. */
++ addi r1, r1, FRAMESIZE /* Restore stack pointer. */
++ mr r3, r30 /* Set the return value length of
++ string. */
++ ld r0, 16(r1) /* Read the saved link register. */
++ ld r29, -24(r1) /* Restore save register r29. */
++ ld r30, -16(r1) /* Restore save register r30. */
++ ld r31, -8(r1) /* Restore save register r31. */
++ mtlr r0 /* Restore link register. */
++ blr /* Branch to link register. */
++
++ .p2align 4
++L(alignment):
++ rldicl. r9, r31, 0, 61 /* Check if s2 is 8byte aligned */
++ beq cr0,L(dwordAligned)
++
++ .p2align 4
++/* Unaligned bytes in string, so process byte by byte.
++ POWER7 has performance gains over loop unroll. */
++L(bytes_unroll):
++ addi r9, r3, -1
++ srdi r10, r29, 2
++ mtctr r10
++ b L(L10)
++ .p2align 4
++L(L44):
++ lbz r10, 1(r31) /* Load byte. */
++ cmpdi cr7, r10, 0 /* Compare ; if byte not zero,
++ continue. */
++ stb r10, 2(r9) /* Store byte */
++ beq cr7, L(done)
++ addi r31, r31, 4
++
++ lbz r10, -2(r31) /* Perform loop unroll here on byte
++ load and store. */
++ cmpdi cr7, r10, 0
++ stb r10, 3(r9)
++ beq cr7, L(done)
++
++ lbz r10, -1(r31) /* Loop unroll here. */
++ cmpdi cr7, r10, 0
++ stbu r10, 4(r9)
++ beq cr7, L(done)
++
++ bdz L(leftNbytes)
++
++L(L10):
++ lbz r10, 0(r31) /* Loop unroll here. */
++ cmpdi cr7, r10, 0
++ stb r10, 1(r9)
++ bne cr7,L(L44)
++ b L(done)
++ .p2align 4
++/* If s2 is double word aligned, we load and store double word. */
++L(dwordAligned):
++/* read, write 8 bytes at a time */
++ srdi r8, r29, 3 /* Compute count for CTR to loop;
++ count = n/8. */
++ li r7, 0 /* Load r7 with NULL. */
++ li r10, 0 /* Load r10 with MASK '0'. */
++
++ mtctr r8 /* Move count to CTR. */
++L(loop8):
++ ld r9, 0(r31) /* Read double word from s2. */
++ cmpb r6, r9, r10 /* Compare bytes in s2 we read
++ just now. */
++ cmpdi r6, 0 /* If cmpb returned NULL,
++ we continue. */
++ bne+ L(a8)
++ std r9, 0(r3) /* Append double word from s2
++ with s1. */
++ addi r3, r3, 8 /* Increment s1. */
++ addi r31, r31, 8 /* Increment s2. */
++ subi r29, r29, 8 /* Decrement count by 8. */
++ bdnz L(loop8) /* Continue until "count" is
++ non zero. */
++
++L(a8):
++ cmpdi r29, 0 /* If "n" is already zero, we skip. */
++ beq+ L(align8align)
++
++ mtctr r29 /* Process left over bytes in "n". */
++L(unaligned0):
++ lbz r9, 0(r31) /* Read a byte from s2. */
++ cmpw r9, r7 /* If byte is NULL, we stop here . */
++ beq+ L(align8align) /* Skip processing further if NULL. */
++ stb r9, 0(r3) /* If not NULL, store byte into s1. */
++ addi r3, r3, 1 /* Increment s1 by 1. */
++ addi r31, r31, 1 /* Increment s2 by 1. */
++ bdnz L(unaligned0) /* Decrement counter "n" and loop
++ until non zero. */
++L(align8align):
++ stb r7, 0(r3) /* Terminate s1 with NULL. */
++
++ addi r1, r1, FRAMESIZE /* Restore stack pointer. */
++ mr r3, r30 /* Set the return value, length of
++ string. */
++ ld r0, 16(r1) /* Read the saved link register. */
++ ld r29, -24(r1) /* Restore save register r29. */
++ ld r30, -16(r1) /* Restore save register r30. */
++ ld r31, -8(r1) /* Restore save register r31. */
++ mtlr r0 /* Restore link register. */
++ blr /* Branch to link register */
++
++ .p2align 4
++L(leftNbytes):
++ rldicl. r29, r29, 0, 62 /* Check if n>0 and n < 4 bytes. */
++ bne cr0,L(byte_by_byte) /* Process bytes one by one. */
++ b L(nullTerminate) /* Now, finish catenation with
++ NULL termination. */
++END(STRNCAT)
+diff --git a/sysdeps/powerpc/powerpc64/power7/strpbrk.S b/sysdeps/powerpc/powerpc64/power7/strpbrk.S
+new file mode 100644
+index 0000000..d6204a7
+--- /dev/null
++++ b/sysdeps/powerpc/powerpc64/power7/strpbrk.S
+@@ -0,0 +1,148 @@
++/* Optimized strpbrk implementation for PowerPC64/POWER7.
++ Copyright (C) 2014 Free Software Foundation, Inc.
++ This file is part of the GNU C Library.
++
++ The GNU C Library is free software; you can redistribute it and/or
++ modify it under the terms of the GNU Lesser General Public
++ License as published by the Free Software Foundation; either
++ version 2.1 of the License, or (at your option) any later version.
++
++ The GNU C Library is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ Lesser General Public License for more details.
++
++ You should have received a copy of the GNU Lesser General Public
++ License along with the GNU C Library; if not, see
++ <http://www.gnu.org/licenses/>. */
++
++#include <sysdep.h>
++
++/* char [r3] *strpbrk(const char [r4] *s, const char [r5] *accept) */
++
++ .machine power7
++EALIGN (strpbrk, 4, 0)
++ CALL_MCOUNT 3
++
++ lbz r10,0(r4)
++ cmpdi cr7,r10,0 /* accept[0] == '\0' ? */
++ beq cr7,L(nullfound)
++
++ /* The idea to speed up the algorithm is to create a lookup table
++ for fast check if input character should be considered. For ASCII
++ or ISO-8859-X character sets it has 256 positions. */
++
++ /* First the table should be cleared and to avoid unaligned accesses
++ when using the VSX stores the table address is aligned to 16
++ bytes. */
++ xxlxor v0,v0,v0
++
++ /* PPC64 ELF ABI stack is aligned to 16 bytes */
++ addi r9,r1,-256
++
++ li r5,16
++ li r6,32
++ li r8,48
++ addi r12,r9,64
++ /* Clear the table with 0 values */
++ stxvw4x v0,r0,r9
++ addi r11,r9,128
++ addi r7,r9,192
++ stxvw4x v0,r9,r5
++ li r0,1
++ stxvw4x v0,r9,r6
++ stxvw4x v0,r9,r8
++ stxvw4x v0,r0,r12
++ stxvw4x v0,r12,r5
++ stxvw4x v0,r12,r6
++ stxvw4x v0,r12,r8
++ stxvw4x v0,r0,r11
++ stxvw4x v0,r11,r5
++ stxvw4x v0,r11,r6
++ stxvw4x v0,r11,r8
++ stxvw4x v0,r0,r7
++ stxvw4x v0,r7,r5
++ stxvw4x v0,r7,r6
++ stxvw4x v0,r7,r8
++
++ /* Initialize the table as:
++ for (i=0; accept[i]; i++
++ table[accept[i]]] = 1 */
++ .p2align 4,,15
++L(init_table):
++ stbx r0,r9,r10
++ lbzu r10,1(r4)
++ cmpdi r0,r10,0
++ bne cr0,L(init_table)
++L(finish_table):
++ /* set table[0] = 1 */
++ li r4,1
++ stb r4,0(r9)
++ b L(mainloop)
++
++ /* Unrool the loop 4 times and check using the table as:
++ i = 0;
++ while (1)
++ {
++ if (table[input[i++]] == 1)
++ return (s[i -1] ? s + i - 1: NULL);
++ if (table[input[i++]] == 1)
++ return (s[i -1] ? s + i - 1: NULL);
++ if (table[input[i++]] == 1)
++ return (s[i -1] ? s + i - 1: NULL);
++ if (table[input[i++]] == 1)
++ return (s[i -1] ? s + i - 1: NULL);
++ } */
++ .p2align 4
++L(unroll):
++ lbz r0,1(r3)
++ lbzx r8,r9,r0
++ cmpwi cr6,r8,1
++ beq cr6,L(checkend2)
++ lbz r10,2(r3)
++ lbzx r4,r9,r10
++ cmpwi cr7,r4,1
++ beq cr7,L(checkend3)
++ lbz r12,3(r3)
++ addi r3,r3,4
++ lbzx r11,r9,r12
++ cmpwi cr0,r11,1
++ beq cr0,L(checkend)
++L(mainloop):
++ lbz r12,0(r3)
++ addi r11,r3,1
++ addi r5,r3,2
++ addi r7,r3,3
++ lbzx r6,r9,r12
++ cmpwi cr1,r6,1
++ bne cr1,L(unroll)
++ cmpdi cr0,r12,0
++ beq cr0,L(nullfound)
++L(end):
++ blr
++
++ .p2align 4
++L(checkend):
++ cmpdi cr1,r12,0
++ mr r3,r7
++ bne cr1,L(end)
++L(nullfound):
++ /* return NULL */
++ li 3,0
++ blr
++
++ .p2align 4
++L(checkend2):
++ cmpdi cr7,r0,0
++ mr r3,r11
++ beq cr7,L(nullfound)
++ blr
++
++ .p2align 4
++L(checkend3):
++ cmpdi cr6,r10,0
++ mr r3,r5
++ beq cr6,L(nullfound)
++ blr
++END (strpbrk)
++libc_hidden_builtin_def (strpbrk)
+diff --git a/sysdeps/powerpc/powerpc64/power7/strrchr.S b/sysdeps/powerpc/powerpc64/power7/strrchr.S
+new file mode 100644
+index 0000000..e4a76c8
+--- /dev/null
++++ b/sysdeps/powerpc/powerpc64/power7/strrchr.S
+@@ -0,0 +1,255 @@
++/* Optimized strrchr implementation for PowerPC64/POWER7 using cmpb insn.
++ Copyright (C) 2014 Free Software Foundation, Inc.
++ This file is part of the GNU C Library.
++
++ The GNU C Library is free software; you can redistribute it and/or
++ modify it under the terms of the GNU Lesser General Public
++ License as published by the Free Software Foundation; either
++ version 2.1 of the License, or (at your option) any later version.
++
++ The GNU C Library is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ Lesser General Public License for more details.
++
++ You should have received a copy of the GNU Lesser General Public
++ License along with the GNU C Library; if not, see
++ <http://www.gnu.org/licenses/>. */
++
++#include <sysdep.h>
++
++/* int [r3] strrchr (char *s [r3], int c [r4]) */
++ .machine power7
++ENTRY (strrchr)
++ CALL_MCOUNT 2
++ dcbt 0,r3
++ clrrdi r8,r3,3 /* Align the address to doubleword boundary. */
++ cmpdi cr7,r4,0
++ ld r12,0(r8) /* Load doubleword from memory. */
++ li r9,0 /* used to store last occurence */
++ li r0,0 /* Doubleword with null chars to use
++ with cmpb. */
++
++ rlwinm r6,r3,3,26,28 /* Calculate padding. */
++
++ beq cr7,L(null_match)
++
++ /* Replicate byte to doubleword. */
++ insrdi r4,r4,8,48
++ insrdi r4,r4,16,32
++ insrdi r4,r4,32,0
++
++ /* r4 is changed now ,if its passed as more chars
++ check for null again */
++ cmpdi cr7,r4,0
++ beq cr7,L(null_match)
++ /* Now r4 has a doubleword of c bytes and r0 has
++ a doubleword of null bytes. */
++
++ cmpb r10,r12,r4 /* Compare each byte against c byte. */
++ cmpb r11,r12,r0 /* Compare each byte against null byte. */
++
++ /* Move the doublewords left and right to discard the bits that are
++ not part of the string and bring them back as zeros. */
++#ifdef __LITTLE_ENDIAN__
++ srd r10,r10,r6
++ srd r11,r11,r6
++ sld r10,r10,r6
++ sld r11,r11,r6
++#else
++ sld r10,r10,r6
++ sld r11,r11,r6
++ srd r10,r10,r6
++ srd r11,r11,r6
++#endif
++ or r5,r10,r11 /* OR the results to speed things up. */
++ cmpdi cr7,r5,0 /* If r5 == 0, no c or null bytes
++ have been found. */
++ bne cr7,L(done)
++
++L(align):
++ mtcrf 0x01,r8
++
++ /* Are we now aligned to a doubleword boundary? If so, skip to
++ the main loop. Otherwise, go through the alignment code. */
++
++ bt 28,L(loop)
++
++ /* Handle WORD2 of pair. */
++ ldu r12,8(r8)
++ cmpb r10,r12,r4
++ cmpb r11,r12,r0
++ or r5,r10,r11
++ cmpdi cr7,r5,0
++ bne cr7,L(done)
++ b L(loop) /* We branch here (rather than falling through)
++ to skip the nops due to heavy alignment
++ of the loop below. */
++ .p2align 5
++L(loop):
++ /* Load two doublewords, compare and merge in a
++ single register for speed. This is an attempt
++ to speed up the null-checking process for bigger strings. */
++ ld r12,8(r8)
++ ldu r7,16(r8)
++ cmpb r10,r12,r4
++ cmpb r11,r12,r0
++ cmpb r6,r7,r4
++ cmpb r7,r7,r0
++ or r12,r10,r11
++ or r5,r6,r7
++ or r5,r12,r5
++ cmpdi cr7,r5,0
++ beq cr7,L(loop)
++
++ /* OK, one (or both) of the doublewords contains a c/null byte. Check
++ the first doubleword and decrement the address in case the first
++ doubleword really contains a c/null byte. */
++ cmpdi cr6,r12,0
++ addi r8,r8,-8
++ bne cr6,L(done)
++
++ /* The c/null byte must be in the second doubleword. Adjust the
++ address again and move the result of cmpb to r10 so we can calculate
++ the pointer. */
++
++ mr r10,r6
++ mr r11,r7
++ addi r8,r8,8
++
++ /* r10/r11 have the output of the cmpb instructions, that is,
++ 0xff in the same position as the c/null byte in the original
++ doubleword from the string. Use that to calculate the pointer. */
++
++L(done):
++ /* if there are more than one 0xff in r11, find the first pos of ff
++ in r11 and fill r10 with 0 from that position */
++ cmpdi cr7,r11,0
++ beq cr7,L(no_null)
++#ifdef __LITTLE_ENDIAN__
++ addi r3,r11,-1
++ andc r3,r3,r11
++ popcntd r0,r3
++#else
++ cntlzd r0,r11
++#endif
++ subfic r0,r0,63
++ li r6,-1
++#ifdef __LITTLE_ENDIAN__
++ srd r0,r6,r0
++#else
++ sld r0,r6,r0
++#endif
++ and r10,r0,r10
++L(no_null):
++#ifdef __LITTLE_ENDIAN__
++ cntlzd r0,r10 /* Count leading zeros before c matches. */
++ addi r3,r10,-1
++ andc r3,r3,r10
++ addi r10,r11,-1
++ andc r10,r10,r11
++ cmpld cr7,r3,r10
++ bgt cr7,L(no_match)
++#else
++ addi r3,r10,-1 /* Count trailing zeros before c matches. */
++ andc r3,r3,r10
++ popcntd r0,r3
++ cmpld cr7,r11,r10
++ bgt cr7,L(no_match)
++#endif
++ srdi r0,r0,3 /* Convert trailing zeros to bytes. */
++ subfic r0,r0,7
++ add r9,r8,r0 /* Return address of the matching c byte
++ or null in case c was not found. */
++ li r0,0
++ cmpdi cr7,r11,0 /* If r11 == 0, no null's have been found. */
++ beq cr7,L(align)
++
++ .align 4
++L(no_match):
++ mr r3,r9
++ blr
++
++/* We are here because strrchr was called with a null byte. */
++ .align 4
++L(null_match):
++ /* r0 has a doubleword of null bytes. */
++
++ cmpb r5,r12,r0 /* Compare each byte against null bytes. */
++
++ /* Move the doublewords left and right to discard the bits that are
++ not part of the string and bring them back as zeros. */
++#ifdef __LITTLE_ENDIAN__
++ srd r5,r5,r6
++ sld r5,r5,r6
++#else
++ sld r5,r5,r6
++ srd r5,r5,r6
++#endif
++ cmpdi cr7,r5,0 /* If r10 == 0, no c or null bytes
++ have been found. */
++ bne cr7,L(done_null)
++
++ mtcrf 0x01,r8
++
++ /* Are we now aligned to a quadword boundary? If so, skip to
++ the main loop. Otherwise, go through the alignment code. */
++
++ bt 28,L(loop_null)
++
++ /* Handle WORD2 of pair. */
++ ldu r12,8(r8)
++ cmpb r5,r12,r0
++ cmpdi cr7,r5,0
++ bne cr7,L(done_null)
++ b L(loop_null) /* We branch here (rather than falling through)
++ to skip the nops due to heavy alignment
++ of the loop below. */
++
++ /* Main loop to look for the end of the string. Since it's a
++ small loop (< 8 instructions), align it to 32-bytes. */
++ .p2align 5
++L(loop_null):
++ /* Load two doublewords, compare and merge in a
++ single register for speed. This is an attempt
++ to speed up the null-checking process for bigger strings. */
++ ld r12,8(r8)
++ ldu r11,16(r8)
++ cmpb r5,r12,r0
++ cmpb r10,r11,r0
++ or r6,r5,r10
++ cmpdi cr7,r6,0
++ beq cr7,L(loop_null)
++
++ /* OK, one (or both) of the doublewords contains a null byte. Check
++ the first doubleword and decrement the address in case the first
++ doubleword really contains a null byte. */
++
++ cmpdi cr6,r5,0
++ addi r8,r8,-8
++ bne cr6,L(done_null)
++
++ /* The null byte must be in the second doubleword. Adjust the address
++ again and move the result of cmpb to r10 so we can calculate the
++ pointer. */
++
++ mr r5,r10
++ addi r8,r8,8
++
++ /* r5 has the output of the cmpb instruction, that is, it contains
++ 0xff in the same position as the null byte in the original
++ doubleword from the string. Use that to calculate the pointer. */
++L(done_null):
++#ifdef __LITTLE_ENDIAN__
++ addi r0,r5,-1
++ andc r0,r0,r5
++ popcntd r0,r0
++#else
++ cntlzd r0,r5 /* Count leading zeros before the match. */
++#endif
++ srdi r0,r0,3 /* Convert trailing zeros to bytes. */
++ add r3,r8,r0 /* Return address of the matching null byte. */
++ blr
++END (strrchr)
++weak_alias (strrchr, rindex)
++libc_hidden_builtin_def (strrchr)
+diff --git a/sysdeps/powerpc/powerpc64/power7/strspn.S b/sysdeps/powerpc/powerpc64/power7/strspn.S
+new file mode 100644
+index 0000000..d587a67
+--- /dev/null
++++ b/sysdeps/powerpc/powerpc64/power7/strspn.S
+@@ -0,0 +1,165 @@
++/* Optimized strspn implementation for PowerPC64/POWER7.
++
++ Copyright (C) 2014 Free Software Foundation, Inc.
++ This file is part of the GNU C Library.
++
++ The GNU C Library is free software; you can redistribute it and/or
++ modify it under the terms of the GNU Lesser General Public
++ License as published by the Free Software Foundation; either
++ version 2.1 of the License, or (at your option) any later version.
++
++ The GNU C Library is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ Lesser General Public License for more details.
++
++ You should have received a copy of the GNU Lesser General Public
++ License along with the GNU C Library; if not, see
++ <http://www.gnu.org/licenses/>. */
++
++/* size_t [r3] strspn (const char *string [r3],
++ const char *needleAccept [r4] */
++
++/* Performance gains are grabbed through following techniques:
++
++ > hashing of needle.
++ > hashing avoids scanning of duplicate entries in needle
++ across the string.
++ > initializing the hash table with Vector instructions
++ by quadword access.
++ > unrolling when scanning for character in string
++ across hash table. */
++
++/* Algorithm is as below:
++ 1. A empty hash table/dictionary is created comprising of
++ 256 ascii character set
++ 2. When hash entry is found in needle , the hash index
++ is initialized to 1
++ 3. The string is scanned until end and for every character,
++ its corresponding hash index is compared.
++ 4. initial length of string (count) until first hit of
++ accept needle to be found is set to 0
++ 4. If hash index is set to 1 for the index of string,
++ count is returned.
++ 5. Otherwise count is incremented and scanning continues
++ until end of string. */
++
++#include <sysdep.h>
++
++#undef strspn
++
++ .machine power7
++EALIGN(strspn, 4, 0)
++ CALL_MCOUNT 2
++
++ lbz r10, 0(r4) /* load r10 with needle (r4) */
++ addi r9, r1, -256 /* r9 is a hash of 256 bytes */
++
++ li r5, 16 /* set r5 = 16 as offset */
++ li r6, 32 /* set r6 = 32 as offset */
++ li r8, 48 /* set r8 = 48 as offset */
++
++/*Iniatliaze hash table with Zeroes in double indexed quadword accesses */
++ xxlxor v0, v0, v0 /* prepare for initializing hash */
++
++ stxvd2x v0, r0, r9 /* initialize 1st quadword */
++ stxvd2x v0, r9, r5
++ stxvd2x v0, r9, r6
++ stxvd2x v0, r9, r8 /* initialize 4th quadword */
++
++ addi r11, r9, 64 /* r11 is index to hash */
++
++ stxvd2x v0, r0, r11 /* initialize 5th quadword */
++ stxvd2x v0, r11, r5
++ stxvd2x v0, r11, r6
++ stxvd2x v0, r11, r8 /* initialize 8th quadword */
++
++ addi r11, r9, 128 /* r11 is index to hash */
++
++ stxvd2x v0, r0, r11 /* initialize 9th quadword */
++ stxvd2x v0, r11, r5
++ stxvd2x v0, r11, r6
++ stxvd2x v0, r11, r8 /* initialize 12th quadword */
++
++ addi r11, r9, 192 /* r11 is index to hash */
++
++ stxvd2x v0, r0, r11 /* initialize 13th quadword */
++ stxvd2x v0, r11, r5
++ stxvd2x v0, r11, r6
++ stxvd2x v0, r11, r8 /* initialize 16th quadword */
++
++ li r8, 1 /* r8=1, marker into hash if found in
++ needle */
++
++ cmpdi cr7, r10, 0 /* accept needle is NULL */
++ beq cr7, L(skipHashing) /* if needle is NULL, skip hashing */
++
++ .p2align 4 /* align section to 16 byte boundary */
++L(hashing):
++ stbx r8, r9, r10 /* update hash with marker for the pivot of
++ the needle */
++ lbzu r10, 1(r4) /* load needle into r10 and update to next */
++ cmpdi cr7, r10, 0 /* if needle is has reached NULL, continue */
++ bne cr7, L(hashing) /* loop to hash the needle */
++
++L(skipHashing):
++ li r10, 0 /* load counter = 0 */
++ b L(beginScan)
++
++ .p2align 4 /* align section to 16 byte boundary */
++L(scanUnroll):
++ lbzx r8, r9, r8 /* load r8 with hash value at index */
++ cmpwi cr7, r8, 0 /* if we hit marker in hash, we have found
++ accept needle */
++ beq cr7, L(ret1stIndex) /* we have hit accept needle, return the
++ count */
++
++ lbz r8, 1(r3) /* load string[1] into r8 */
++ addi r10, r10, 4 /* increment counter */
++ lbzx r8, r9, r8 /* load r8 with hash value at index */
++ cmpwi cr7, r8, 0 /* if we hit marker in hash, we have found
++ accept needle */
++ beq cr7, L(ret2ndIndex) /* we have hit accept needle, return the
++ count */
++
++ lbz r8, 2(r3) /* load string[2] into r8 */
++ lbzx r8, r9, r8 /* load r8 with hash value at index */
++ cmpwi cr7, r8, 0 /* if we hit marker in hash, we have found
++ accept needle */
++ beq cr7, L(ret3rdIndex) /* we have hit accept needle, return the
++ count */
++
++ lbz r8, 3(r3) /* load string[3] into r8 */
++ lbzx r8, r9, r8 /* load r8 with hash value at index */
++ addi r3, r3, 4 /* unroll factor , increment string by 4 */
++ cmpwi cr7, r8, 0 /* if we hit marker in hash, we have found
++ accept needle */
++ beq cr7,L(ret4thIndex) /* we have hit accept needle, return the
++ count */
++
++L(beginScan):
++ lbz r8, 0(r3) /* load string[0] into r8 */
++ addi r6, r10, 1 /* place holder for counter + 1 */
++ addi r5, r10, 2 /* place holder for counter + 2 */
++ addi r4, r10, 3 /* place holder for counter + 3 */
++ cmpdi cr7, r8, 0 /* if we hit marker in hash, we have found
++ accept needle */
++ bne cr7, L(scanUnroll) /* continue scanning */
++
++L(ret1stIndex):
++ mr r3, r10 /* update r3 for return */
++ blr /* return */
++
++L(ret2ndIndex):
++ mr r3, r6 /* update r3 for return */
++ blr /* return */
++
++L(ret3rdIndex):
++ mr r3, r5 /* update r3 for return */
++ blr /* return */
++
++L(ret4thIndex):
++ mr r3, r4 /* update r3 for return */
++ blr /* done */
++END(strspn)
++libc_hidden_builtin_def (strspn)
+diff --git a/sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S b/sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S
+new file mode 100644
+index 0000000..2b27e7b
+--- /dev/null
++++ b/sysdeps/powerpc/powerpc64/power8/fpu/s_finite.S
+@@ -0,0 +1,61 @@
++/* isfinite(). PowerPC64/POWER8 version.
++ Copyright (C) 2014 Free Software Foundation, Inc.
++ This file is part of the GNU C Library.
++
++ The GNU C Library is free software; you can redistribute it and/or
++ modify it under the terms of the GNU Lesser General Public
++ License as published by the Free Software Foundation; either
++ version 2.1 of the License, or (at your option) any later version.
++
++ The GNU C Library is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ Lesser General Public License for more details.
++
++ You should have received a copy of the GNU Lesser General Public
++ License along with the GNU C Library; if not, see
++ <http://www.gnu.org/licenses/>. */
++
++#include <sysdep.h>
++#include <endian.h>
++#include <math_ldbl_opt.h>
++
++#if __BYTE_ORDER == __LITTLE_ENDIAN
++#define MFVSRD_R3_V1 .byte 0x66,0x00,0x23,0x7c /* mfvsrd r3,vs1 */
++#else
++#define MFVSRD_R3_V1 .byte 0x7c,0x23,0x00,0x66 /* mfvsrd r3,vs1 */
++#endif
++
++/* int [r3] __finite ([fp1] x) */
++
++EALIGN (__finite, 4, 0)
++ CALL_MCOUNT 0
++ MFVSRD_R3_V1
++ lis r9,0x8010
++ clrldi r3,r3,1 /* r3 = r3 & 0x8000000000000000 */
++ rldicr r9,r9,32,31 /* r9 = (r9 << 32) & 0xffffffff */
++ add r3,r3,r9
++ rldicl r3,r3,1,63
++ blr
++END (__finite)
++
++hidden_def (__finite)
++weak_alias (__finite, finite)
++
++/* It turns out that the 'double' version will also always work for
++ single-precision. */
++strong_alias (__finite, __finitef)
++hidden_def (__finitef)
++weak_alias (__finitef, finitef)
++
++#ifdef IS_IN_libm
++# if LONG_DOUBLE_COMPAT (libm, GLIBC_2_0)
++compat_symbol (libm, __finite, __finitel, GLIBC_2_0)
++compat_symbol (libm, finite, finitel, GLIBC_2_0)
++# endif
++#else
++# if LONG_DOUBLE_COMPAT (libc, GLIBC_2_0)
++compat_symbol (libc, __finite, __finitel, GLIBC_2_0);
++compat_symbol (libc, finite, finitel, GLIBC_2_0);
++# endif
++#endif
+diff --git a/sysdeps/powerpc/powerpc64/power8/fpu/s_finitef.S b/sysdeps/powerpc/powerpc64/power8/fpu/s_finitef.S
+new file mode 100644
+index 0000000..54bd941
+--- /dev/null
++++ b/sysdeps/powerpc/powerpc64/power8/fpu/s_finitef.S
+@@ -0,0 +1 @@
++/* This function uses the same code as s_finite.S. */
+diff --git a/sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S b/sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S
+new file mode 100644
+index 0000000..d09b7fc
+--- /dev/null
++++ b/sysdeps/powerpc/powerpc64/power8/fpu/s_isinf.S
+@@ -0,0 +1,66 @@
++/* isinf(). PowerPC64/POWER8 version.
++ Copyright (C) 2014 Free Software Foundation, Inc.
++ This file is part of the GNU C Library.
++
++ The GNU C Library is free software; you can redistribute it and/or
++ modify it under the terms of the GNU Lesser General Public
++ License as published by the Free Software Foundation; either
++ version 2.1 of the License, or (at your option) any later version.
++
++ The GNU C Library is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ Lesser General Public License for more details.
++
++ You should have received a copy of the GNU Lesser General Public
++ License along with the GNU C Library; if not, see
++ <http://www.gnu.org/licenses/>. */
++
++#include <sysdep.h>
++#include <endian.h>
++#include <math_ldbl_opt.h>
++
++#if __BYTE_ORDER == __LITTLE_ENDIAN
++#define MFVSRD_R3_V1 .byte 0x66,0x00,0x23,0x7c /* mfvsrd r3,vs1 */
++#else
++#define MFVSRD_R3_V1 .byte 0x7c,0x23,0x00,0x66 /* mfvsrd r3,vs1 */
++#endif
++
++/* int [r3] __isinf([fp1] x) */
++
++EALIGN (__isinf, 4, 0)
++ CALL_MCOUNT 0
++ MFVSRD_R3_V1
++ lis r9,0x7ff0 /* r9 = 0x7ff0 */
++ rldicl r10,r3,0,1 /* r10 = r3 & (0x8000000000000000) */
++ sldi r9,r9,32 /* r9 = r9 << 52 */
++ cmpd cr7,r10,r9 /* fp1 & 0x7ff0000000000000 ? */
++ beq cr7,L(inf)
++ li r3,0 /* Not inf */
++ blr
++L(inf):
++ sradi r3,r3,63 /* r3 = r3 >> 63 */
++ ori r3,r3,1 /* r3 = r3 | 0x1 */
++ blr
++END (__isinf)
++
++hidden_def (__isinf)
++weak_alias (__isinf, isinf)
++
++/* It turns out that the 'double' version will also always work for
++ single-precision. */
++strong_alias (__isinf, __isinff)
++hidden_def (__isinff)
++weak_alias (__isinff, isinff)
++
++#ifdef NO_LONG_DOUBLE
++strong_alias (__isinf, __isinfl)
++weak_alias (__isinf, isinfl)
++#endif
++
++#ifndef IS_IN_libm
++# if LONG_DOUBLE_COMPAT(libc, GLIBC_2_0)
++compat_symbol (libc, __isinf, __isinfl, GLIBC_2_0);
++compat_symbol (libc, isinf, isinfl, GLIBC_2_0);
++# endif
++#endif
+diff --git a/sysdeps/powerpc/powerpc64/power8/fpu/s_isinff.S b/sysdeps/powerpc/powerpc64/power8/fpu/s_isinff.S
+new file mode 100644
+index 0000000..be759e0
+--- /dev/null
++++ b/sysdeps/powerpc/powerpc64/power8/fpu/s_isinff.S
+@@ -0,0 +1 @@
++/* This function uses the same code as s_isinf.S. */
+diff --git a/sysdeps/powerpc/powerpc64/power8/fpu/s_isnan.S b/sysdeps/powerpc/powerpc64/power8/fpu/s_isnan.S
+new file mode 100644
+index 0000000..b03c896
+--- /dev/null
++++ b/sysdeps/powerpc/powerpc64/power8/fpu/s_isnan.S
+@@ -0,0 +1,58 @@
++/* isnan(). PowerPC64/POWER8 version.
++ Copyright (C) 2014 Free Software Foundation, Inc.
++ This file is part of the GNU C Library.
++
++ The GNU C Library is free software; you can redistribute it and/or
++ modify it under the terms of the GNU Lesser General Public
++ License as published by the Free Software Foundation; either
++ version 2.1 of the License, or (at your option) any later version.
++
++ The GNU C Library is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ Lesser General Public License for more details.
++
++ You should have received a copy of the GNU Lesser General Public
++ License along with the GNU C Library; if not, see
++ <http://www.gnu.org/licenses/>. */
++
++#include <sysdep.h>
++#include <endian.h>
++#include <math_ldbl_opt.h>
++
++#if __BYTE_ORDER == __LITTLE_ENDIAN
++#define MFVSRD_R3_V1 .byte 0x66,0x00,0x23,0x7c /* mfvsrd r3,vs1 */
++#else
++#define MFVSRD_R3_V1 .byte 0x7c,0x23,0x00,0x66 /* mfvsrd r3,vs1 */
++#endif
++
++/* int [r3] __isnan([f1] x) */
++
++EALIGN (__isnan, 4, 0)
++ CALL_MCOUNT 0
++ MFVSRD_R3_V1
++ lis r9,0x7ff0
++ clrldi r3,r3,1 /* r3 = r3 & 0x8000000000000000 */
++ rldicr r9,r9,32,31 /* r9 = (r9 << 32) & 0xffffffff */
++ subf r3,r3,r9
++ rldicl r3,r3,1,63
++ blr
++END (__isnan)
++
++/* It turns out that the 'double' version will also always work for
++ single-precision. */
++strong_alias (__isnan, __isnanf)
++hidden_def (__isnanf)
++weak_alias (__isnanf, isnanf)
++
++#ifdef NO_LONG_DOUBLE
++strong_alias (__isnan, __isnanl)
++weak_alias (__isnan, isnanl)
++#endif
++
++#ifndef IS_IN_libm
++# if LONG_DOUBLE_COMPAT(libc, GLIBC_2_0)
++compat_symbol (libc, __isnan, __isnanl, GLIBC_2_0);
++compat_symbol (libc, isnan, isnanl, GLIBC_2_0);
++# endif
++#endif
+diff --git a/sysdeps/powerpc/powerpc64/power8/fpu/s_isnanf.S b/sysdeps/powerpc/powerpc64/power8/fpu/s_isnanf.S
+new file mode 100644
+index 0000000..b48c85e
+--- /dev/null
++++ b/sysdeps/powerpc/powerpc64/power8/fpu/s_isnanf.S
+@@ -0,0 +1 @@
++/* This function uses the same code as s_isnan.S. */
+diff --git a/sysdeps/powerpc/powerpc64/power8/fpu/s_llrint.S b/sysdeps/powerpc/powerpc64/power8/fpu/s_llrint.S
+new file mode 100644
+index 0000000..9a55d93
+--- /dev/null
++++ b/sysdeps/powerpc/powerpc64/power8/fpu/s_llrint.S
+@@ -0,0 +1,50 @@
++/* Round double to long int. POWER8 PowerPC64 version.
++ Copyright (C) 2014 Free Software Foundation, Inc.
++ This file is part of the GNU C Library.
++
++ The GNU C Library is free software; you can redistribute it and/or
++ modify it under the terms of the GNU Lesser General Public
++ License as published by the Free Software Foundation; either
++ version 2.1 of the License, or (at your option) any later version.
++
++ The GNU C Library is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ Lesser General Public License for more details.
++
++ You should have received a copy of the GNU Lesser General Public
++ License along with the GNU C Library; if not, see
++ <http://www.gnu.org/licenses/>. */
++
++#include <sysdep.h>
++#include <endian.h>
++#include <math_ldbl_opt.h>
++
++#if __BYTE_ORDER == __LITTLE_ENDIAN
++#define MFVSRD_R3_V1 .byte 0x66,0x00,0x23,0x7c /* mfvsrd r3,vs1 */
++#else
++#define MFVSRD_R3_V1 .byte 0x7c,0x23,0x00,0x66 /* mfvsrd r3,vs1 */
++#endif
++
++/* long long int[r3] __llrint (double x[fp1]) */
++ENTRY (__llrint)
++ CALL_MCOUNT 0
++ fctid fp1,fp1
++ MFVSRD_R3_V1
++ blr
++END (__llrint)
++
++strong_alias (__llrint, __lrint)
++weak_alias (__llrint, llrint)
++weak_alias (__lrint, lrint)
++
++#ifdef NO_LONG_DOUBLE
++strong_alias (__llrint, __llrintl)
++weak_alias (__llrint, llrintl)
++strong_alias (__lrint, __lrintl)
++weak_alias (__lrint, lrintl)
++#endif
++#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_1)
++compat_symbol (libm, __llrint, llrintl, GLIBC_2_1)
++compat_symbol (libm, __lrint, lrintl, GLIBC_2_1)
++#endif
+diff --git a/sysdeps/powerpc/powerpc64/power8/fpu/s_llround.S b/sysdeps/powerpc/powerpc64/power8/fpu/s_llround.S
+new file mode 100644
+index 0000000..f10c06a
+--- /dev/null
++++ b/sysdeps/powerpc/powerpc64/power8/fpu/s_llround.S
+@@ -0,0 +1,52 @@
++/* llround function. POWER8 PowerPC64 version.
++ Copyright (C) 2014 Free Software Foundation, Inc.
++ This file is part of the GNU C Library.
++
++ The GNU C Library is free software; you can redistribute it and/or
++ modify it under the terms of the GNU Lesser General Public
++ License as published by the Free Software Foundation; either
++ version 2.1 of the License, or (at your option) any later version.
++
++ The GNU C Library is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
++ Lesser General Public License for more details.
++
++ You should have received a copy of the GNU Lesser General Public
++ License along with the GNU C Library; if not, see
++ <http://www.gnu.org/licenses/>. */
++
++#include <sysdep.h>
++#include <endian.h>
++#include <math_ldbl_opt.h>
++
++#if __BYTE_ORDER == __LITTLE_ENDIAN
++#define MFVSRD_R3_V1 .byte 0x66,0x00,0x23,0x7c /* mfvsrd r3,vs1 */
++#else
++#define MFVSRD_R3_V1 .byte 0x7c,0x23,0x00,0x66 /* mfvsrd r3,vs1 */
++#endif
++
++/* long long [r3] llround (float x [fp1]) */
++
++ENTRY (__llround)
++ CALL_MCOUNT 0
++ frin fp1,fp1 /* Round to nearest +-0.5. */
++ fctidz fp1,fp1 /* Convert To Integer DW round toward 0. */
++ MFVSRD_R3_V1
++ blr
++END (__llround)
++
++strong_alias (__llround, __lround)
++weak_alias (__llround, llround)
++weak_alias (__lround, lround)
++
++#ifdef NO_LONG_DOUBLE
++weak_alias (__llround, llroundl)
++strong_alias (__llround, __llroundl)
++weak_alias (__lround, lroundl)
++strong_alias (__lround, __lroundl)
++#endif
++#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_1)
++compat_symbol (libm, __llround, llroundl, GLIBC_2_1)
++compat_symbol (libm, __lround, lroundl, GLIBC_2_1)
++#endif
+diff --git a/sysdeps/powerpc/powerpc64/start.S b/sysdeps/powerpc/powerpc64/start.S
+index 15e29d9..934c558 100644
+--- a/sysdeps/powerpc/powerpc64/start.S
++++ b/sysdeps/powerpc/powerpc64/start.S
+@@ -74,7 +74,7 @@ ENTRY(_start)
+
+ /* put the address of start_addresses in r8... **
+ ** PPC64 ABI uses R13 for thread local, so we leave it alone */
+- ld r8,.L01(r2)
++ ld r8,.L01@toc(r2)
+
+ /* and continue in libc-start, in glibc. */
+ b JUMPTARGET(__libc_start_main)
Modified: glibc-package/branches/eglibc-2.19/debian/patches/series
===================================================================
--- glibc-package/branches/eglibc-2.19/debian/patches/series 2014-04-04 23:00:20 UTC (rev 6011)
+++ glibc-package/branches/eglibc-2.19/debian/patches/series 2014-04-09 22:09:31 UTC (rev 6012)
@@ -161,8 +161,7 @@
mips/submitted-rld_map.diff
powerpc/local-math-logb.diff
-powerpc/cvs-bzero-static-ppc64.diff
-powerpc/cvs-bzero-static-ppc32.diff
+powerpc/cvs-ibm-branch.diff
s390/submitted-nexttowardf.diff
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