[Date Prev][Date Next] [Thread Prev][Thread Next] [Date Index] [Thread Index]

Bug#896063: gcc-default-ports: cross compiler for RISC-V 32bit



Control: reassign -1 wnpp
Control: retitle -1 RFP: gcc-riscv32-none -- GCC cross compiler for 32-bit RISC-V processors

On Thu, 10 Jan 2019 20:45:49 +0100 Stefan Tauner wrote:

> So this should actually be an RFP class bug?
> Should this one be converted or closed and another one opened?

Converting the current bug into an RFP sounds like the right answer.

Heinrich, gcc-defaults-ports is for cross-compilers for full Debian
architectures, not for bare metal cross-compilers.

If you want a 32-bit RISC-V bare metal toolchain within Debian, we
suggest that you look at gcc-arm-none-eabi and the mentors page, if you
file a request for sponsorship, please XCC it to the debian-riscv list:

https://mentors.debian.net/intro-maintainers
https://lists.debian.org/debian-riscv/
https://www.debian.org/Bugs/Reporting#xcc

-- 
bye,
pabs

https://wiki.debian.org/PaulWise

Attachment: signature.asc
Description: This is a digitally signed message part


Reply to: