--- Begin Message ---
Package: src:gcc-6
Version: 6.3.0-3
Hi, gcc-7 has added a new option to disable madd.fmt/msub.fmt etc instructions,
as
1. For the MIPS standard, these instructions are unfused, while on Loongson,
they are fused. With these instructions enabled, some software
may failed to
run on Loongson.
2. With some test, these instructions won't take significant
performance boost.
So, we decide to disable these instructions at all.
In this patch, we also:
1. generate fused madd4 instructions when -march=loongson3a used.
2. add a new option: -mlxc1-sxc1.
--
YunQiang Su
diff --git a/debian/patches/MIPS-MADD4.diff b/debian/patches/MIPS-MADD4.diff
new file mode 100644
index 0000000..e668b8c
--- /dev/null
+++ b/debian/patches/MIPS-MADD4.diff
@@ -0,0 +1,307 @@
+From eb5c0cb6c16d435f6797cd934ceaac73ac7db52c Mon Sep 17 00:00:00 2001
+From: clm <clm@138bc75d-0d04-0410-961f-82ee72b054a4>
+Date: Fri, 20 Jan 2017 01:05:25 +0000
+Subject: [PATCH] gcc/ 2017-01-19 Matthew Fortune
+ <matthew.fortune@imgtec.com> Yunqiang Su <yunqiang.su@imgtec.com>
+
+ * config.gcc (supported_defaults): Add madd4.
+ (with_madd4): Add validation.
+ (all_defaults): Add madd4.
+ * config/mips/mips.opt (mmadd4): New option.
+ * gcc/config/mips/mips.h (OPTION_DEFAULT_SPECS): Add a default for
+ mmadd4.
+ (TARGET_CPU_CPP_BUILTINS): Add builtin_define for
+ __mips_no_madd4.
+ (ISA_HAS_UNFUSED_MADD4): Gate with mips_madd4.
+ (ISA_HAS_FUSED_MADD4): Likewise.
+ * gcc/doc/invoke.texi (-mmadd4): Document the new option.
+ * gcc/doc/install.texi (--with-madd4): Document the new option.
+
+gcc/testsuite/
+2017-01-19 Matthew Fortune <matthew.fortune@imgtec.com>
+
+ * gcc.target/mips/madd4-1.c: New file.
+ * gcc.target/mips/madd4-2.c: Likewise.
+ * gcc.target/mips/mips.exp (mips_option_groups): Add ghost option
+ HAS_MADD4.
+ (mips_option_groups): Add -m[no-]madd4.
+ (mips-dg-init): Detect default -mno-madd4.
+ (mips-dg-options): Handle HAS_MADD4 arch upgrade/downgrade.
+ * gcc.target/mips/mips-ps-type.c: Add -mmadd4 test option.
+ * gcc.target/mips/mips-ps-type-2.c: Likewise.
+ * gcc.target/mips/nmadd-1.c: Likewise.
+ * gcc.target/mips/nmadd-2.c: Likewise.
+ * gcc.target/mips/nmadd-3.c: Likewise.
+
+
+git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@244676 138bc75d-0d04-0410-961f-82ee72b054a4
+---
+ gcc/ChangeLog | 16 ++++++++++++++++
+ gcc/config.gcc | 19 +++++++++++++++++--
+ gcc/config/mips/mips.h | 12 +++++++++---
+ gcc/config/mips/mips.opt | 4 ++++
+ gcc/doc/install.texi | 14 ++++++++++++++
+ gcc/doc/invoke.texi | 8 +++++++-
+ gcc/testsuite/ChangeLog | 15 +++++++++++++++
+ gcc/testsuite/gcc.target/mips/madd4-1.c | 14 ++++++++++++++
+ gcc/testsuite/gcc.target/mips/madd4-2.c | 14 ++++++++++++++
+ gcc/testsuite/gcc.target/mips/mips-ps-type-2.c | 2 +-
+ gcc/testsuite/gcc.target/mips/mips-ps-type.c | 2 +-
+ gcc/testsuite/gcc.target/mips/mips.exp | 12 +++++++++++-
+ gcc/testsuite/gcc.target/mips/nmadd-1.c | 2 +-
+ gcc/testsuite/gcc.target/mips/nmadd-2.c | 2 +-
+ gcc/testsuite/gcc.target/mips/nmadd-3.c | 2 +-
+ 15 files changed, 126 insertions(+), 12 deletions(-)
+ create mode 100644 gcc/testsuite/gcc.target/mips/madd4-1.c
+ create mode 100644 gcc/testsuite/gcc.target/mips/madd4-2.c
+
+Index: b/src/gcc/config.gcc
+===================================================================
+--- a/src/gcc/config.gcc
++++ b/src/gcc/config.gcc
+@@ -3987,7 +3987,7 @@ case "${target}" in
+ ;;
+
+ mips*-*-*)
+- supported_defaults="abi arch arch_32 arch_64 float fpu nan fp_32 odd_spreg_32 tune tune_32 tune_64 divide llsc mips-plt synci lxc1-sxc1"
++ supported_defaults="abi arch arch_32 arch_64 float fpu nan fp_32 odd_spreg_32 tune tune_32 tune_64 divide llsc mips-plt synci lxc1-sxc1 madd4"
+
+ case ${with_float} in
+ "" | soft | hard)
+@@ -4125,6 +4125,21 @@ case "${target}" in
+ exit 1
+ ;;
+ esac
++
++ case ${with_madd4} in
++ yes)
++ with_madd4=madd4
++ ;;
++ no)
++ with_madd4=no-madd4
++ ;;
++ "")
++ ;;
++ *)
++ echo "Unknown madd4 type used in --with-madd4" 1>&2
++ exit 1
++ ;;
++ esac
+ ;;
+
+ nds32*-*-*)
+@@ -4558,7 +4573,7 @@ case ${target} in
+ esac
+
+ t=
+-all_defaults="abi cpu cpu_32 cpu_64 arch arch_32 arch_64 tune tune_32 tune_64 schedule float mode fpu nan fp_32 odd_spreg_32 divide llsc mips-plt synci tls lxc1-sxc1"
++all_defaults="abi cpu cpu_32 cpu_64 arch arch_32 arch_64 tune tune_32 tune_64 schedule float mode fpu nan fp_32 odd_spreg_32 divide llsc mips-plt synci tls lxc1-sxc1 madd4"
+ for option in $all_defaults
+ do
+ eval "val=\$with_"`echo $option | sed s/-/_/g`
+Index: b/src/gcc/config/mips/mips.h
+===================================================================
+--- a/src/gcc/config/mips/mips.h
++++ b/src/gcc/config/mips/mips.h
+@@ -621,6 +621,8 @@ struct mips_cpu_info {
+ builtin_define ("__GCC_HAVE_BUILTIN_MIPS_CACHE"); \
+ if (!ISA_HAS_LXC1_SXC1) \
+ builtin_define ("__mips_no_lxc1_sxc1"); \
++ if (!ISA_HAS_UNFUSED_MADD4 && !ISA_HAS_FUSED_MADD4) \
++ builtin_define ("__mips_no_madd4"); \
+ } \
+ while (0)
+
+@@ -898,7 +900,8 @@ struct mips_cpu_info {
+ {"llsc", "%{!mllsc:%{!mno-llsc:-m%(VALUE)}}" }, \
+ {"mips-plt", "%{!mplt:%{!mno-plt:-m%(VALUE)}}" }, \
+ {"synci", "%{!msynci:%{!mno-synci:-m%(VALUE)}}" }, \
+- {"lxc1-sxc1", "%{!mlxc1-sxc1:%{!mno-lxc1-sxc1:-m%(VALUE)}}" } \
++ {"lxc1-sxc1", "%{!mlxc1-sxc1:%{!mno-lxc1-sxc1:-m%(VALUE)}}" }, \
++ {"madd4", "%{!mmadd4:%{!mno-madd4:-m%(VALUE)}}" } \
+
+ /* A spec that infers the:
+ -mnan=2008 setting from a -mips argument,
+@@ -1089,11 +1092,14 @@ struct mips_cpu_info {
+
+ /* ISA has 4 operand fused madd instructions of the form
+ 'd = [+-] (a * b [+-] c)'. */
+-#define ISA_HAS_FUSED_MADD4 (TARGET_MIPS8000 || TARGET_LOONGSON_3A)
++#define ISA_HAS_FUSED_MADD4 (mips_madd4 \
++ && (TARGET_MIPS8000 \
++ || TARGET_LOONGSON_3A))
+
+ /* ISA has 4 operand unfused madd instructions of the form
+ 'd = [+-] (a * b [+-] c)'. */
+-#define ISA_HAS_UNFUSED_MADD4 (ISA_HAS_FP4 \
++#define ISA_HAS_UNFUSED_MADD4 (mips_madd4 \
++ && ISA_HAS_FP4 \
+ && !TARGET_MIPS8000 \
+ && !TARGET_LOONGSON_3A)
+
+Index: b/src/gcc/config/mips/mips.opt
+===================================================================
+--- a/src/gcc/config/mips/mips.opt
++++ b/src/gcc/config/mips/mips.opt
+@@ -388,6 +388,10 @@ mlxc1-sxc1
+ Target Report Var(mips_lxc1_sxc1) Init(1)
+ Use lwxc1/swxc1/ldxc1/sdxc1 instructions where applicable.
+
++mmadd4
++Target Report Var(mips_madd4) Init(1)
++Use 4-operand madd.s/madd.d and related instructions where applicable.
++
+ mtune=
+ Target RejectNegative Joined Var(mips_tune_option) ToLower Enum(mips_arch_opt_value)
+ -mtune=PROCESSOR Optimize the output for PROCESSOR.
+Index: b/src/gcc/testsuite/gcc.target/mips/madd4-1.c
+===================================================================
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/mips/madd4-1.c
+@@ -0,0 +1,14 @@
++/* { dg-do compile } */
++/* { dg-options "-ffast-math -mno-madd4 (HAS_MADD4) -mhard-float" } */
++/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
++/* { dg-final { scan-assembler-not "\tmadd.s\t" } } */
++
++#ifndef __mips_no_madd4
++#error missing definition of __mips_no_madd4
++#endif
++
++NOMIPS16 float
++madd4 (float f, float g, float h)
++{
++ return (f * g) + h;
++}
+Index: b/src/gcc/testsuite/gcc.target/mips/madd4-2.c
+===================================================================
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/mips/madd4-2.c
+@@ -0,0 +1,14 @@
++/* { dg-do compile } */
++/* { dg-options "-ffast-math -mmadd4 (HAS_MADD4) -mhard-float" } */
++/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
++/* { dg-final { scan-assembler "\tmadd.s\t" } } */
++
++#ifdef __mips_no_madd4
++#error unexpected definition of __mips_no_madd4
++#endif
++
++NOMIPS16 float
++madd4 (float f, float g, float h)
++{
++ return (f * g) + h;
++}
+Index: b/src/gcc/testsuite/gcc.target/mips/mips-ps-type-2.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/mips/mips-ps-type-2.c
++++ b/src/gcc/testsuite/gcc.target/mips/mips-ps-type-2.c
+@@ -1,7 +1,7 @@
+ /* Test v2sf calculations. The nmadd and nmsub patterns need
+ -ffinite-math-only. */
+ /* { dg-do compile } */
+-/* { dg-options "(HAS_MADDPS) -mgp32 -mpaired-single -ffinite-math-only forbid_cpu=octeon.*" } */
++/* { dg-options "(HAS_MADDPS) -mmadd4 -mgp32 -mpaired-single -ffinite-math-only forbid_cpu=octeon.*" } */
+ /* { dg-skip-if "nmadd and nmsub need combine" { *-*-* } { "-O0" } { "" } } */
+ /* { dg-final { scan-assembler "\tcvt.ps.s\t" } } */
+ /* { dg-final { scan-assembler "\tmov.ps\t" } } */
+Index: b/src/gcc/testsuite/gcc.target/mips/mips-ps-type.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/mips/mips-ps-type.c
++++ b/src/gcc/testsuite/gcc.target/mips/mips-ps-type.c
+@@ -1,7 +1,7 @@
+ /* Test v2sf calculations. The nmadd and nmsub patterns need
+ -ffinite-math-only. */
+ /* { dg-do compile } */
+-/* { dg-options "-mpaired-single -mgp64 -ffinite-math-only forbid_cpu=octeon.*" } */
++/* { dg-options "-mpaired-single -mmadd4 -mgp64 -ffinite-math-only forbid_cpu=octeon.*" } */
+ /* { dg-skip-if "nmadd and nmsub need combine" { *-*-* } { "-O0" } { "" } } */
+ /* { dg-final { scan-assembler "\tcvt.ps.s\t" } } */
+ /* { dg-final { scan-assembler "\tmov.ps\t" } } */
+Index: b/src/gcc/testsuite/gcc.target/mips/mips.exp
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/mips/mips.exp
++++ b/src/gcc/testsuite/gcc.target/mips/mips.exp
+@@ -256,6 +256,7 @@ set mips_option_groups {
+ ldc "HAS_LDC"
+ movn "HAS_MOVN"
+ madd "HAS_MADD"
++ madd4_ghost "HAS_MADD4"
+ maddps "HAS_MADDPS"
+ lsa "(|!)HAS_LSA"
+ lxc1 "HAS_LXC1"
+@@ -283,6 +284,7 @@ foreach option {
+ local-sdata
+ long-calls
+ lxc1-sxc1
++ madd4
+ paired-single
+ plt
+ shared
+@@ -822,6 +824,12 @@ proc mips-dg-init {} {
+ "-mlxc1-sxc1"
+ #endif
+
++ #ifdef __mips_no_madd4
++ "-mno-madd4"
++ #else
++ "-mmadd4"
++ #endif
++
+ #ifdef __mips_synci
+ "-msynci",
+ #else
+@@ -1132,6 +1140,7 @@ proc mips-dg-options { args } {
+ #
+ } elseif { $isa < 4
+ + && ([mips_have_test_option_p options "HAS_LXC1"]
+++ || [mips_have_test_option_p options "HAS_MADD4"]
+ + || [mips_have_test_option_p options "HAS_MOVN"]) } {
+ mips_make_test_option options "-mips4"
+ # We need MIPS III or higher for:
+@@ -1174,8 +1183,9 @@ proc mips-dg-options { args } {
+ || [mips_have_test_option_p options "-mfix-r10000"]
+ || [mips_have_test_option_p options "NOT_HAS_DMUL"]
+ || [mips_have_test_option_p options "HAS_LXC1"]
+- || [mips_have_test_option_p options "HAS_MOVN"]
+ || [mips_have_test_option_p options "HAS_MADD"]
++ || [mips_have_test_option_p options "HAS_MADD4"]
++ || [mips_have_test_option_p options "HAS_MOVN"]
+ || [mips_have_test_option_p options "-mpaired-single"]
+ || [mips_have_test_option_p options "-mnan=legacy"]
+ || [mips_have_test_option_p options "-mabs=legacy"]
+Index: b/src/gcc/testsuite/gcc.target/mips/nmadd-1.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/mips/nmadd-1.c
++++ b/src/gcc/testsuite/gcc.target/mips/nmadd-1.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-ffast-math isa=4 -mhard-float" } */
++/* { dg-options "-ffast-math -mmadd4 isa=4 -mhard-float" } */
+ /* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+ /* { dg-final { scan-assembler "\tnmadd.s\t" } } */
+ /* { dg-final { scan-assembler "\tnmadd.d\t" } } */
+Index: b/src/gcc/testsuite/gcc.target/mips/nmadd-2.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/mips/nmadd-2.c
++++ b/src/gcc/testsuite/gcc.target/mips/nmadd-2.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-fno-fast-math -ffinite-math-only isa=4 -mhard-float" } */
++/* { dg-options "-fno-fast-math -ffinite-math-only -mmadd4 isa=4 -mhard-float" } */
+ /* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+ /* { dg-final { scan-assembler "\tnmadd.s\t" } } */
+ /* { dg-final { scan-assembler "\tnmadd.d\t" } } */
+Index: b/src/gcc/testsuite/gcc.target/mips/nmadd-3.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/mips/nmadd-3.c
++++ b/src/gcc/testsuite/gcc.target/mips/nmadd-3.c
+@@ -1,7 +1,7 @@
+ /* The same code as nmadd-2.c, but compiled with -fno-finite-math-only.
+ We can't use nmadd and nmsub in that case. */
+ /* { dg-do compile } */
+-/* { dg-options "-fno-fast-math -fno-finite-math-only isa=4 -mhard-float" } */
++/* { dg-options "-fno-fast-math -fno-finite-math-only -mmadd4 isa=4 -mhard-float" } */
+ /* { dg-final { scan-assembler-not "\tnmadd" } } */
+ /* { dg-final { scan-assembler-not "\tnmsub" } } */
+
diff --git a/debian/patches/MIPS-Make-loongson3a-use-fused-madd.d.diff b/debian/patches/MIPS-Make-loongson3a-use-fused-madd.d.diff
new file mode 100644
index 0000000..c731e52
--- /dev/null
+++ b/debian/patches/MIPS-Make-loongson3a-use-fused-madd.d.diff
@@ -0,0 +1,39 @@
+From 04877b8f39eff7bc35ff4d3bcdd8196ec1449c43 Mon Sep 17 00:00:00 2001
+From: mpf <mpf@138bc75d-0d04-0410-961f-82ee72b054a4>
+Date: Thu, 19 Jan 2017 16:26:32 +0000
+Subject: [PATCH] MIPS: Make loongson3a use fused madd.d
+
+gcc/
+ * config/mips/mips.h (ISA_HAS_FUSED_MADD4): Enable for
+ TARGET_LOONGSON_3A.
+ (ISA_HAS_UNFUSED_MADD4): Exclude TARGET_LOONGSON_3A.
+
+git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@244641 138bc75d-0d04-0410-961f-82ee72b054a4
+---
+ gcc/ChangeLog | 6 ++++++
+ gcc/config/mips/mips.h | 6 ++++--
+ 2 files changed, 10 insertions(+), 2 deletions(-)
+
+diff --git a/src/gcc/config/mips/mips.h b/src/gcc/config/mips/mips.h
+index 4205589af45..81032c9f94c 100644
+--- a/src/gcc/config/mips/mips.h
++++ b/src/gcc/config/mips/mips.h
+@@ -1066,11 +1066,13 @@ struct mips_cpu_info {
+
+ /* ISA has 4 operand fused madd instructions of the form
+ 'd = [+-] (a * b [+-] c)'. */
+-#define ISA_HAS_FUSED_MADD4 TARGET_MIPS8000
++#define ISA_HAS_FUSED_MADD4 (TARGET_MIPS8000 || TARGET_LOONGSON_3A)
+
+ /* ISA has 4 operand unfused madd instructions of the form
+ 'd = [+-] (a * b [+-] c)'. */
+-#define ISA_HAS_UNFUSED_MADD4 (ISA_HAS_FP4 && !TARGET_MIPS8000)
++#define ISA_HAS_UNFUSED_MADD4 (ISA_HAS_FP4 \
++ && !TARGET_MIPS8000 \
++ && !TARGET_LOONGSON_3A)
+
+ /* ISA has 3 operand r6 fused madd instructions of the form
+ 'c = c [+-] (a * b)'. */
+--
+2.11.0
+
diff --git a/debian/patches/MIPS-PR-target-78176-add-mlxc1-sxc1.diff b/debian/patches/MIPS-PR-target-78176-add-mlxc1-sxc1.diff
new file mode 100644
index 0000000..9a1bb94
--- /dev/null
+++ b/debian/patches/MIPS-PR-target-78176-add-mlxc1-sxc1.diff
@@ -0,0 +1,321 @@
+From fccc4b5408942b92bc00bc053f4da9af2109557c Mon Sep 17 00:00:00 2001
+From: mpf <mpf@138bc75d-0d04-0410-961f-82ee72b054a4>
+Date: Thu, 19 Jan 2017 16:05:59 +0000
+Subject: [PATCH] MIPS: PR target/78176 add -mlxc1-sxc1.
+
+gcc/
+
+ PR target/78176
+ * config.gcc (supported_defaults): Add lxc1-sxc1.
+ (with_lxc1_sxc1): Add validation.
+ (all_defaults): Add lxc1-sxc1.
+ * config/mips/mips.opt (mlxc1-sxc1): New option.
+ * gcc/config/mips/mips.h (OPTION_DEFAULT_SPECS): Add a default for
+ mlxc1-sxc1.
+ (TARGET_CPU_CPP_BUILTINS): Add builtin_define for
+ __mips_no_lxc1_sxc1.
+ (ISA_HAS_LXC1_SXC1): Gate with mips_lxc1_sxc1.
+ * gcc/doc/invoke.texi (-mlxc1-sxc1): Document the new option.
+ * doc/install.texi (--with-lxc1-sxc1): Document the new option.
+
+gcc/testsuite/
+
+ * gcc.target/mips/lxc1-sxc1-1.c: New file.
+ * gcc.target/mips/lxc1-sxc1-2.c: Likewise.
+ * gcc.target/mips/mips.exp (mips_option_groups): Add ghost option
+ HAS_LXC1.
+ (mips_option_groups): Add -m[no-]lxc1-sxc1.
+ (mips-dg-init): Detect default -mno-lxc1-sxc1.
+ (mips-dg-options): Handle HAS_LXC1 arch upgrade/downgrade.
+
+git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@244640 138bc75d-0d04-0410-961f-82ee72b054a4
+---
+ gcc/ChangeLog | 15 ++++++++
+ gcc/config.gcc | 19 ++++++++-
+ gcc/config/mips/mips.h | 8 +++-
+ gcc/config/mips/mips.opt | 4 ++
+ gcc/doc/install.texi | 19 +++++++++
+ gcc/doc/invoke.texi | 6 +++
+ gcc/testsuite/ChangeLog | 11 ++++++
+ gcc/testsuite/gcc.target/mips/lxc1-sxc1-1.c | 60 +++++++++++++++++++++++++++++
+ gcc/testsuite/gcc.target/mips/lxc1-sxc1-2.c | 60 +++++++++++++++++++++++++++++
+ gcc/testsuite/gcc.target/mips/mips.exp | 12 +++++-
+ 10 files changed, 209 insertions(+), 5 deletions(-)
+ create mode 100644 gcc/testsuite/gcc.target/mips/lxc1-sxc1-1.c
+ create mode 100644 gcc/testsuite/gcc.target/mips/lxc1-sxc1-2.c
+
+Index: b/src/gcc/config.gcc
+===================================================================
+--- a/src/gcc/config.gcc
++++ b/src/gcc/config.gcc
+@@ -3987,7 +3987,7 @@ case "${target}" in
+ ;;
+
+ mips*-*-*)
+- supported_defaults="abi arch arch_32 arch_64 float fpu nan fp_32 odd_spreg_32 tune tune_32 tune_64 divide llsc mips-plt synci"
++ supported_defaults="abi arch arch_32 arch_64 float fpu nan fp_32 odd_spreg_32 tune tune_32 tune_64 divide llsc mips-plt synci lxc1-sxc1"
+
+ case ${with_float} in
+ "" | soft | hard)
+@@ -4110,6 +4110,21 @@ case "${target}" in
+ exit 1
+ ;;
+ esac
++
++ case ${with_lxc1_sxc1} in
++ yes)
++ with_lxc1_sxc1=lxc1-sxc1
++ ;;
++ no)
++ with_lxc1_sxc1=no-lxc1-sxc1
++ ;;
++ "")
++ ;;
++ *)
++ echo "Unknown lxc1-sxc1 type used in --with-lxc1-sxc1" 1>&2
++ exit 1
++ ;;
++ esac
+ ;;
+
+ nds32*-*-*)
+@@ -4543,7 +4558,7 @@ case ${target} in
+ esac
+
+ t=
+-all_defaults="abi cpu cpu_32 cpu_64 arch arch_32 arch_64 tune tune_32 tune_64 schedule float mode fpu nan fp_32 odd_spreg_32 divide llsc mips-plt synci tls"
++all_defaults="abi cpu cpu_32 cpu_64 arch arch_32 arch_64 tune tune_32 tune_64 schedule float mode fpu nan fp_32 odd_spreg_32 divide llsc mips-plt synci tls lxc1-sxc1"
+ for option in $all_defaults
+ do
+ eval "val=\$with_"`echo $option | sed s/-/_/g`
+Index: b/src/gcc/config/mips/mips.h
+===================================================================
+--- a/src/gcc/config/mips/mips.h
++++ b/src/gcc/config/mips/mips.h
+@@ -619,6 +619,8 @@ struct mips_cpu_info {
+ \
+ if (TARGET_CACHE_BUILTIN) \
+ builtin_define ("__GCC_HAVE_BUILTIN_MIPS_CACHE"); \
++ if (!ISA_HAS_LXC1_SXC1) \
++ builtin_define ("__mips_no_lxc1_sxc1"); \
+ } \
+ while (0)
+
+@@ -895,7 +897,8 @@ struct mips_cpu_info {
+ {"divide", "%{!mdivide-traps:%{!mdivide-breaks:-mdivide-%(VALUE)}}" }, \
+ {"llsc", "%{!mllsc:%{!mno-llsc:-m%(VALUE)}}" }, \
+ {"mips-plt", "%{!mplt:%{!mno-plt:-m%(VALUE)}}" }, \
+- {"synci", "%{!msynci:%{!mno-synci:-m%(VALUE)}}" }
++ {"synci", "%{!msynci:%{!mno-synci:-m%(VALUE)}}" }, \
++ {"lxc1-sxc1", "%{!mlxc1-sxc1:%{!mno-lxc1-sxc1:-m%(VALUE)}}" } \
+
+ /* A spec that infers the:
+ -mnan=2008 setting from a -mips argument,
+@@ -1059,7 +1062,8 @@ struct mips_cpu_info {
+
+ /* ISA has floating-point indexed load and store instructions
+ (LWXC1, LDXC1, SWXC1 and SDXC1). */
+-#define ISA_HAS_LXC1_SXC1 ISA_HAS_FP4
++#define ISA_HAS_LXC1_SXC1 (ISA_HAS_FP4 \
++ && mips_lxc1_sxc1)
+
+ /* ISA has paired-single instructions. */
+ #define ISA_HAS_PAIRED_SINGLE ((ISA_MIPS64 \
+Index: b/src/gcc/config/mips/mips.opt
+===================================================================
+--- a/src/gcc/config/mips/mips.opt
++++ b/src/gcc/config/mips/mips.opt
+@@ -384,6 +384,10 @@ mlra
+ Target Report Var(mips_lra_flag) Init(1) Save
+ Use LRA instead of reload.
+
++mlxc1-sxc1
++Target Report Var(mips_lxc1_sxc1) Init(1)
++Use lwxc1/swxc1/ldxc1/sdxc1 instructions where applicable.
++
+ mtune=
+ Target RejectNegative Joined Var(mips_tune_option) ToLower Enum(mips_arch_opt_value)
+ -mtune=PROCESSOR Optimize the output for PROCESSOR.
+Index: b/src/gcc/testsuite/gcc.target/mips/lxc1-sxc1-1.c
+===================================================================
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/mips/lxc1-sxc1-1.c
+@@ -0,0 +1,60 @@
++/* { dg-options "(HAS_LXC1) -mno-lxc1-sxc1" } */
++/* { dg-final { scan-assembler-not "\tldxc1\t" } } */
++/* { dg-final { scan-assembler-not "\tsdxc1\t" } } */
++
++#ifndef __mips_no_lxc1_sxc1
++#error missing definition of __mips_no_lxc1_sxc1
++#endif
++
++double ldexp(double x, int exp);
++
++typedef struct
++{
++ double** rows;
++} d_mat_struct;
++
++typedef d_mat_struct d_mat_t[1];
++
++#define d_mat_entry(mat,i,j) (*((mat)->rows[i] + (j)))
++
++double __attribute__((noinline))
++ldxc1_test (int kappa, int zeros, double ctt, int* expo, d_mat_t r, double* s)
++{
++ int kappa2 = kappa;
++ double tmp = 0.0;
++
++ do
++ {
++ kappa--;
++ if (kappa > zeros + 1)
++ {
++ tmp = d_mat_entry(r, kappa - 1, kappa - 1) * ctt;
++ tmp = ldexp(tmp, (expo[kappa - 1] - expo[kappa2]));
++ }
++ }
++ while ((kappa >= zeros + 2) && (s[kappa - 1] <= tmp));
++
++ return tmp;
++}
++
++#define SIZE 20
++
++int main(void)
++{
++ int kappa = SIZE - 1;
++ int zeros = 1;
++ double ctt = 2;
++
++ int expo[SIZE] = {0};
++ double s[SIZE] = {0};
++ double rows_data[SIZE][SIZE] = {0};
++ double* rows[SIZE];
++
++ for (int i = 0; i < SIZE; i++)
++ rows[i] = rows_data[i];
++
++ d_mat_t r = { rows };
++
++ ldxc1_test(kappa, zeros, ctt, expo, r, s);
++ return 0;
++}
+Index: b/src/gcc/testsuite/gcc.target/mips/lxc1-sxc1-2.c
+===================================================================
+--- /dev/null
++++ b/src/gcc/testsuite/gcc.target/mips/lxc1-sxc1-2.c
+@@ -0,0 +1,60 @@
++/* { dg-options "(HAS_LXC1) -mlxc1-sxc1" } */
++/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
++/* { dg-final { scan-assembler "\tldxc1\t" } } */
++
++#ifdef __mips_no_lxc1_sxc1
++#error unexpected definition of __mips_no_lxc1_sxc1
++#endif
++
++double ldexp(double x, int exp);
++
++typedef struct
++{
++ double** rows;
++} d_mat_struct;
++
++typedef d_mat_struct d_mat_t[1];
++
++#define d_mat_entry(mat,i,j) (*((mat)->rows[i] + (j)))
++
++double __attribute__((noinline))
++ldxc1_test (int kappa, int zeros, double ctt, int* expo, d_mat_t r, double* s)
++{
++ int kappa2 = kappa;
++ double tmp = 0.0;
++
++ do
++ {
++ kappa--;
++ if (kappa > zeros + 1)
++ {
++ tmp = d_mat_entry(r, kappa - 1, kappa - 1) * ctt;
++ tmp = ldexp(tmp, (expo[kappa - 1] - expo[kappa2]));
++ }
++ }
++ while ((kappa >= zeros + 2) && (s[kappa - 1] <= tmp));
++
++ return tmp;
++}
++
++#define SIZE 20
++
++int main(void)
++{
++ int kappa = SIZE - 1;
++ int zeros = 1;
++ double ctt = 2;
++
++ int expo[SIZE] = {0};
++ double s[SIZE] = {0};
++ double rows_data[SIZE][SIZE] = {0};
++ double* rows[SIZE];
++
++ for (int i = 0; i < SIZE; i++)
++ rows[i] = rows_data[i];
++
++ d_mat_t r = { rows };
++
++ ldxc1_test(kappa, zeros, ctt, expo, r, s);
++ return 0;
++}
+Index: b/src/gcc/testsuite/gcc.target/mips/mips.exp
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/mips/mips.exp
++++ b/src/gcc/testsuite/gcc.target/mips/mips.exp
+@@ -258,6 +258,7 @@ set mips_option_groups {
+ madd "HAS_MADD"
+ maddps "HAS_MADDPS"
+ lsa "(|!)HAS_LSA"
++ lxc1 "HAS_LXC1"
+ section_start "-Wl,--section-start=.*"
+ frame-header "-mframe-header-opt|-mno-frame-header-opt"
+ stack-protector "-fstack-protector"
+@@ -281,6 +282,7 @@ foreach option {
+ gpopt
+ local-sdata
+ long-calls
++ lxc1-sxc1
+ paired-single
+ plt
+ shared
+@@ -814,6 +816,12 @@ proc mips-dg-init {} {
+ "-mno-smartmips",
+ #endif
+
++ #ifdef __mips_no_lxc1_sxc1
++ "-mno-lxc1-sxc1",
++ #else
++ "-mlxc1-sxc1"
++ #endif
++
+ #ifdef __mips_synci
+ "-msynci",
+ #else
+@@ -1122,8 +1130,9 @@ proc mips-dg-options { args } {
+ # We need MIPS IV or higher for:
+ #
+ #
+- } elseif { $isa < 3
+- && [mips_have_test_option_p options "HAS_MOVN"] } {
++ } elseif { $isa < 4
+++ && ([mips_have_test_option_p options "HAS_LXC1"]
+++ || [mips_have_test_option_p options "HAS_MOVN"]) } {
+ mips_make_test_option options "-mips4"
+ # We need MIPS III or higher for:
+ #
+@@ -1164,6 +1173,7 @@ proc mips-dg-options { args } {
+ || [mips_have_test_option_p options "-mfp32"]
+ || [mips_have_test_option_p options "-mfix-r10000"]
+ || [mips_have_test_option_p options "NOT_HAS_DMUL"]
++ || [mips_have_test_option_p options "HAS_LXC1"]
+ || [mips_have_test_option_p options "HAS_MOVN"]
+ || [mips_have_test_option_p options "HAS_MADD"]
+ || [mips_have_test_option_p options "-mpaired-single"]
diff --git a/debian/rules.patch b/debian/rules.patch
index 0ee63ef..12f1875 100644
--- a/debian/rules.patch
+++ b/debian/rules.patch
@@ -328,6 +328,10 @@ debian_patches += skip-bootstrap-multilib
debian_patches += libjava-fixed-symlinks
debian_patches += libffi-ro-eh_frame_sect
debian_patches += libffi-mips
+debian_patches += MIPS-PR-target-78176-add-mlxc1-sxc1 \
+ MIPS-Make-loongson3a-use-fused-madd.d \
+ MIPS-MADD4 \
+
# sigaction on sparc changed between glibc 2.19 and 2.21
ifeq (,$(filter 2.1%, $(shell dpkg-query -l libc-bin | awk '/^.i/ {print $$3}')))
diff --git a/debian/rules2 b/debian/rules2
index 47867bb..74b487e 100644
--- a/debian/rules2
+++ b/debian/rules2
@@ -633,6 +633,7 @@ endif
ifneq (,$(findstring mips-linux,$(DEB_TARGET_GNU_TYPE)))
CONFARGS += --with-arch-32=mips32r2 --with-fp-32=xx
+ CONFARGS += --with-madd4=no
ifeq ($(multilib),yes)
ifeq ($(biarchn32)-$(biarch64),yes-yes)
CONFARGS += --enable-targets=all
@@ -643,6 +644,7 @@ endif
ifneq (,$(findstring mipsel-linux,$(DEB_TARGET_GNU_TYPE)))
CONFARGS += --with-arch-32=mips32r2 --with-fp-32=xx
+ CONFARGS += --with-madd4=no
ifeq ($(multilib),yes)
ifeq ($(biarchn32)-$(biarch64),yes-yes)
CONFARGS += --enable-targets=all
@@ -653,6 +655,7 @@ endif
#FIXME: howto for mipsn32?
ifneq (,$(findstring mips64el-linux-gnuabin32,$(DEB_TARGET_GNU_TYPE)))
+ CONFARGS += --with-madd4=no
ifeq ($(multilib),yes)
ifeq ($(biarchn32)-$(biarch32),yes-yes)
CONFARGS += --enable-targets=all
@@ -663,6 +666,7 @@ ifneq (,$(findstring mips64el-linux-gnuabin32,$(DEB_TARGET_GNU_TYPE)))
endif
ifneq (,$(findstring mips64-linux-gnuabin32,$(DEB_TARGET_GNU_TYPE)))
+ CONFARGS += --with-madd4=no
ifeq ($(multilib),yes)
ifeq ($(biarchn32)-$(biarch32),yes-yes)
CONFARGS += --enable-targets=all
@@ -675,6 +679,7 @@ endif
ifneq (,$(findstring mips64el-linux-gnuabi64,$(DEB_TARGET_GNU_TYPE)))
CONFARGS += --with-mips-plt
CONFARGS += --with-arch-64=mips64r2
+ CONFARGS += --with-madd4=no
ifeq ($(multilib),yes)
ifeq ($(biarchn32)-$(biarch32),yes-yes)
CONFARGS += --enable-targets=all
@@ -686,6 +691,7 @@ endif
ifneq (,$(findstring mips64-linux-gnuabi64,$(DEB_TARGET_GNU_TYPE)))
CONFARGS += --with-mips-plt
CONFARGS += --with-arch-64=mips64r2
+ CONFARGS += --with-madd4=no
ifeq ($(multilib),yes)
ifeq ($(biarchn32)-$(biarch32),yes-yes)
CONFARGS += --enable-targets=all
--- End Message ---