Package: gcc-5
Version: 5.1.1-11
X-Debbugs-CC: debian-mips@lists.debian.org,
Matthew.Fortune@imgtec.com, James.Cowgill@imgtec.com,
Ian.Oliver@imgtec.com
We are proposed to configure gcc with
--with-fp-32=xx
option for mips O32 ABI.
The three primary reasons for extending the current O32 ABI are the
introduction of the MSA ASE, the desire to exploit the FR=1 mode of
current FPUs and the new MIPS32r6 architecture revision which only
supports the ‘FR=1’ mode.
A modeless O32 ABI extension will be defined to allow code to run on
MIPS processor in either FR=0 or FR=1 mode. This ABI extension is
referred to as O32 FPXX ABI.
For more details about FR mode, please see:
https://dmz-portal.mips.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking
--
YunQiang Su
Attachment:
0001-gcc-5-mips-32-fpxx.patch
Description: Binary data