Bug#278379: Atomic stdc++ operations are broken on some MIPS machines

[Thiemo Seufer <ica2_ts@csv.ica.uni-stuttgart.de>]

Daniel Jacobowitz wrote:
[snip]
> > > IIRC, likely branches are deprecated in the latest MIPS ISAs; we
> > > shouldn't be introducing more of them.  I don't know what silicon bug
> > > you're working around, though, so I don't know if there's a better way.
> > 
> > R10000 before revision 2.6 fail to handle ll/sc atomically under
> > somewhat obscure circumstances connected to the branch prediction
> > mechanism and the pipeline length (Erratum #6). The branch likely
> > avoids that specific bug. IRIX uses the same workaround, the Erratum
> > suggests IIRC a much less efficient workaround.
> 
> Hmm.  I'm not sure what to do with this.  I don't want to add them to
> libstdc++ since MIPS is threatening to remove them...

Well, libstdc++ has no means to detect the CPU type, so it's hard to
conditionalize it. OTOH, those instructions might be useless on CPUs
with advanced branch prediction, but removing them breaks backward
compatibility and provides little gain, so MIPS probably isn't too
hasty to remove them.

At least so far, MIPS was careful to extend successor ISAs to a
proper superset of the predecessor WRT non-privileged instructions.


Thiemo