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Re: [DRAFT] resolving DFSG violations

On Wed, Oct 29, 2008 at 10:58:12PM +0100, Michelle Konzack wrote:
> Am 2008-10-27 17:01:50, schrieb Felipe Sateler:
> > Jeff Carr wrote:
> > 
> > > But the opencore case is the easy case, hybrid chips don't even have
> > > source. The firmware blob is often generated when you fabricate the
> > > chip & changes with the physical board layout. You guys just don't
> > > understand the issues here.
> > 
> > Please explain what the issues are, then. The firmware blob has to be generated
> > *somehow*. There is a tool that generates the blob. Which data does the tool
> > need to generate it?
> The IDE/Software which produce the firmware  blobs  mostly  generate  it
> directly and the projects the developers are using are binary stuff.

And what do you type in this software to produce this "project"? This
"project" would be source code, anyway. Even if we did not have the
tools to produce the same "firmware" from this.

> Parts of it maybe human readable but not suffisant to compile it  or  do
> anything usefull with it.
> And as I have already written, SDCC compiled code is 3 times  bigger  as
> the firmeware blob generated by a 8000 US$ IDE.

And do you write C code in your IDE? What else does this IDE provide you
to help you optimize your C code? If it's not C code, what is it? And it
would be very hard to compare C-code with hand-written assembly.

> And using a Microcontroller/ASIC with bigger memory is no solution since
> sometimes it would be very costly...
> In my case arround 3 million Euro more for the final production (18mio).

A good solution would be to improve the free/libre software available in
Debian, since you seem to claim that SDCC is an option as a development
tool to this said micro-controller. Is it a 8051?

> Thanks, Greetings and nice Day/Evening
>     Michelle Konzack

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