Accepted verilog-mode 366-1 (source all)

[NIIBE Yutaka <gniibe@fsij.org>]

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Format: 1.7
Date: Mon, 15 Oct 2007 10:07:24 +0900
Source: verilog-mode
Binary: verilog-mode
Architecture: source all
Version: 366-1
Distribution: unstable
Urgency: low
Maintainer: NIIBE Yutaka <gniibe@fsij.org>
Changed-By: NIIBE Yutaka <gniibe@fsij.org>
Description: 
 verilog-mode - Emacs mode for editing Verilog HDL
Changes: 
 verilog-mode (366-1) unstable; urgency=low
 .
   * New upstream release.
Files: 
 6004e96bca255188f9cdbc0cde673aa9 627 editors optional verilog-mode_366-1.dsc
 185290eb948a57cff0225a4d06f2d915 87779 editors optional verilog-mode_366.orig.tar.gz
 489eeb1f761a9950875ef74277c79097 2634 editors optional verilog-mode_366-1.diff.gz
 f6a9e0b92df396a3a39f6a6e9e3903bf 90978 editors optional verilog-mode_366-1_all.deb

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Accepted:
verilog-mode_366-1.diff.gz
  to pool/main/v/verilog-mode/verilog-mode_366-1.diff.gz
verilog-mode_366-1.dsc
  to pool/main/v/verilog-mode/verilog-mode_366-1.dsc
verilog-mode_366-1_all.deb
  to pool/main/v/verilog-mode/verilog-mode_366-1_all.deb
verilog-mode_366.orig.tar.gz
  to pool/main/v/verilog-mode/verilog-mode_366.orig.tar.gz