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Accepted intel-microcode 1.20140122.1~bpo60+1 (amd64 i386 source)



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Hash: SHA512

Format: 1.8
Date: Sat, 19 Apr 2014 16:36:24 -0300
Source: intel-microcode
Binary: intel-microcode
Architecture: amd64 i386 source
Version: 1.20140122.1~bpo60+1
Distribution: squeeze-backports
Urgency: high
Maintainer: Henrique de Moraes Holschuh <hmh@debian.org>
Changed-By: Henrique de Moraes Holschuh <hmh@debian.org>
Closes: 692535 722048
Description: 
 intel-microcode - Processor microcode firmware for Intel CPUs
Changes: 
 intel-microcode (1.20140122.1~bpo60+1) squeeze-backports; urgency=low
 .
   * Rebuild for squeeze-backports (no changes)
 .
 intel-microcode (1.20140122.1) stable; urgency=low
 .
   * New upstream microcode data file 20140122
     + New Microcodes:
       sig 0x00040661, pf mask 0x32, 2013-08-21, rev 0x000f, size 23552
     + Updated Microcodes:
       sig 0x000106e5, pf mask 0x13, 2013-08-20, rev 0x0007, size 7168
       sig 0x000306c3, pf mask 0x32, 2013-08-16, rev 0x0017, size 20480
       sig 0x000306e4, pf mask 0xed, 2013-07-09, rev 0x0416, size 11264
       sig 0x00040651, pf mask 0x72, 2013-09-14, rev 0x0017, size 19456
 .
 intel-microcode (1.20130906.1~bpo60+1) squeeze-backports; urgency=high
 .
   * Rebuild for squeeze-backports (no changes)
 .
 intel-microcode (1.20130906.1) stable; urgency=high
 .
   * New upstream microcode data file 20130906
     + Updated Microcodes:
       sig 0x000306c3, pf mask 0x32, 2013-08-07, rev 0x0016, size 20480
       sig 0x00040651, pf mask 0x72, 2013-08-08, rev 0x0016, size 19456
     + Updated Microcodes (recently removed):
       sig 0x000106e4, pf mask 0x09, 2013-07-01, rev 0x0003, size 6144
   * This microcode release *likely* fixes the security issues addressed by
     the 20130808 update for signature 0x106e4 (Xeon EC3500/EC5500/LC3500/
     LC5500, Jasper Forest core), which was missing from the 20130808 update
   * upstream changelog: trim down, sunrise now at 20080220, the first
     microcode pack with a license that allows redistribution
   * cpu-signatures.txt: Xeon nocona cores are 64-bit, ship for amd64 arch
     (closes: #722048)
   * source: remove superseded upstream data file: 20130808
 .
 intel-microcode (1.20130808.0+deb7u1) stable; urgency=high
 .
   * New upstream microcode data file 20130808
     + New Microcodes:
       sig 0x000306c3, pf mask 0x32, 2013-07-02, rev 0x0012, size 19456
       sig 0x000306e4, pf mask 0xed, 2013-06-13, rev 0x0415, size 11264
       sig 0x000306e6, pf mask 0xed, 2013-06-19, rev 0x0600, size 11264
       sig 0x00040651, pf mask 0x72, 2013-07-02, rev 0x0015, size 18432
     + Updated Microcodes (removed in the past):
       sig 0x000106a5, pf mask 0x03, 2013-06-21, rev 0x0019, size 10240
     + Updated Microcodes:
       sig 0x000106a4, pf mask 0x03, 2013-06-21, rev 0x0012, size 14336
       sig 0x000106e5, pf mask 0x13, 2013-07-01, rev 0x0006, size 7168
       sig 0x00020652, pf mask 0x12, 2013-06-26, rev 0x000e, size 8192
       sig 0x00020655, pf mask 0x92, 2013-06-28, rev 0x0004, size 3072
       sig 0x000206a7, pf mask 0x12, 2013-06-12, rev 0x0029, size 10240
       sig 0x000206d7, pf mask 0x6d, 2013-06-17, rev 0x0710, size 17408
       sig 0x000206f2, pf mask 0x05, 2013-06-18, rev 0x0037, size 13312
       sig 0x000306a9, pf mask 0x12, 2013-06-13, rev 0x0019, size 12288
     + Removed Microcodes:
       sig 0x000106e4, pf mask 0x09, 2010-03-08, rev 0x0002, size 5120
     + This microcode update has been documented by Intel to fix a severe
       security issue (refer to LP bug 1212497); This update is known to fix
       several nasty errata on 1st to 4th gens of Core i3/i5/i7, and Xeon
       5500 and later, including but not limited to:
       + AAK167/BT248: Virtual APIC accesses with 32-bit PAE paging
         may cause system crash
       + AAK170/BT246: The upper 32 bits of CR3 may be incorrectly used
         with 32-bit paging
     + Erratum AAK167/BT248 is nasty: "If a logical processor has EPT (Extended
       Page Tables) enabled, is using 32-bit PAE paging, and accesses the
       virtual-APIC page then a complex sequence of internal processor
       micro-architectural events may cause an incorrect address translation or
       machine check on either logical processor.  This erratum may result in
       unexpected faults, an uncorrectable TLB error logged in
       IA32_MCi_STATUS.MCACOD (bits [15:0]), a guest or hypervisor crash, or
       other unpredictable system behavior"
   * kernel preinst: simplify and load microcode and cpuid modules
   * postinst: attempt to load microcode module (closes: #692535)
   * Remove from the source package an unused upstream microcode bundle,
     which has been completely superseded by later bundles:
     microcode-20130222.dat
   * Use 1.20130808.0+deb7u1 as the Debian version to start a new branch that
     sorts before 1.20130808.1, which was uploaded to unstable.  Further
     updates targeting stable will go into the 1.x branch.  Further updates
     targeting unstable and stable-backports will go into the 2.x branch
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 fe2551b39ba42eae9fedf870d01319177bd44fd7 521670 intel-microcode_1.20140122.1~bpo60+1_i386.deb
Checksums-Sha256: 
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Files: 
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 0faef9866f3182e1e231140431786765 830524 non-free/admin standard intel-microcode_1.20140122.1~bpo60+1.tar.xz
 8b1aa6fa48c403fe749d4a371bbcdc4e 378374 non-free/admin standard intel-microcode_1.20140122.1~bpo60+1_amd64.deb
 16dcaf9d567fa94ef36807554284f8f1 521670 non-free/admin standard intel-microcode_1.20140122.1~bpo60+1_i386.deb

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