Re: Bug#1017961: mozjs102: Fails to build on armel
Control: forwarded -1 https://bugzilla.mozilla.org/show_bug.cgi?id=1786619
On Tue, 23 Aug 2022 at 13:31:21 +0100, Simon McVittie wrote:
> I tried the attached patch
Sorry, now attached.
> The next thing I'm going to try is using gcc 11 on armel as a workaround
> for #1017979.
That worked, but a lot of tests fail, probably as a result of the attached
patch being wrong. But perhaps it's enough to point someone in the right
direction?
smcv
From: Simon McVittie <smcv@debian.org>
Date: Tue, 23 Aug 2022 09:21:30 +0100
Subject: jit: Only use ARMv7 atomic operations on ARMv7 or higher
Debian's armel (ARM EABI softfloat) port has a lower baseline than the
armhf (ARM EABI hardfloat), currently ARMv5, so we need to fall back
to the "feeling lucky" atomics on this architecture.
Bug-Debian: https://bugs.debian.org/1017961
Signed-off-by: Simon McVittie <smcv@debian.org>
---
js/src/jit/GenerateAtomicOperations.py | 23 +++++++++++++---------
.../shared/AtomicOperations-feeling-lucky-gcc.h | 5 ++++-
2 files changed, 18 insertions(+), 10 deletions(-)
diff --git a/js/src/jit/GenerateAtomicOperations.py b/js/src/jit/GenerateAtomicOperations.py
index d8a38a0..1cc1bf6 100644
--- a/js/src/jit/GenerateAtomicOperations.py
+++ b/js/src/jit/GenerateAtomicOperations.py
@@ -12,6 +12,11 @@ is_64bit = "JS_64BIT" in buildconfig.defines
cpu_arch = buildconfig.substs["CPU_ARCH"]
is_gcc = buildconfig.substs["CC_TYPE"] == "gcc"
+if cpu_arch == "arm":
+ armv7 = (int(buildconfig.substs["ARM_ARCH"]) >= 7)
+else:
+ armv7 = False
+
def fmt_insn(s):
return '"' + s + '\\n\\t"\n'
@@ -32,7 +37,7 @@ def gen_seqcst(fun_name):
}""" % {
"fun_name": fun_name,
}
- if cpu_arch == "arm":
+ if cpu_arch == "arm" and armv7:
return r"""
INLINE_ATTR void %(fun_name)s() {
asm volatile ("dmb sy\n\t" ::: "memory");
@@ -104,7 +109,7 @@ def gen_load(fun_name, cpp_type, size, barrier):
"fun_name": fun_name,
"insns": insns,
}
- if cpu_arch == "arm":
+ if cpu_arch == "arm" and armv7:
insns = ""
if barrier:
insns += fmt_insn("dmb sy")
@@ -191,7 +196,7 @@ def gen_store(fun_name, cpp_type, size, barrier):
"fun_name": fun_name,
"insns": insns,
}
- if cpu_arch == "arm":
+ if cpu_arch == "arm" and armv7:
insns = ""
if barrier:
insns += fmt_insn("dmb sy")
@@ -280,7 +285,7 @@ def gen_exchange(fun_name, cpp_type, size):
"fun_name": fun_name,
"insns": insns,
}
- if cpu_arch == "arm":
+ if cpu_arch == "arm" and armv7:
insns = ""
insns += fmt_insn("dmb sy")
insns += fmt_insn("0:")
@@ -336,7 +341,7 @@ def gen_cmpxchg(fun_name, cpp_type, size):
"cpp_type": cpp_type,
"fun_name": fun_name,
}
- if cpu_arch == "arm" and size == 64:
+ if cpu_arch == "arm" and size == 64 and armv7:
return r"""
INLINE_ATTR %(cpp_type)s %(fun_name)s(%(cpp_type)s* addr,
%(cpp_type)s oldval,
@@ -440,7 +445,7 @@ def gen_cmpxchg(fun_name, cpp_type, size):
"fun_name": fun_name,
"insns": insns,
}
- if cpu_arch == "arm":
+ if cpu_arch == "arm" and armv7:
insns = ""
insns += fmt_insn("dmb sy")
insns += fmt_insn("0:")
@@ -595,7 +600,7 @@ def gen_fetchop(fun_name, cpp_type, size, op):
"fun_name": fun_name,
"insns": insns,
}
- if cpu_arch == "arm":
+ if cpu_arch == "arm" and armv7:
insns = ""
insns += fmt_insn("dmb sy")
insns += fmt_insn("0:")
@@ -664,7 +669,7 @@ def gen_copy(fun_name, cpp_type, size, unroll, direction):
assert size == 8
insns += fmt_insn("ldr %x[scratch], [%x[src], OFFSET]")
insns += fmt_insn("str %x[scratch], [%x[dst], OFFSET]")
- elif cpu_arch == "arm":
+ elif cpu_arch == "arm" and armv7:
if size == 1:
insns += fmt_insn("ldrb %[scratch], [%[src], #OFFSET]")
insns += fmt_insn("strb %[scratch], [%[dst], #OFFSET]")
@@ -721,7 +726,7 @@ namespace jit {
def generate_atomics_header(c_out):
contents = ""
- if cpu_arch in ("x86", "x86_64", "arm", "aarch64"):
+ if cpu_arch in ("x86", "x86_64", "aarch64") or armv7:
contents += "#define JS_HAVE_GENERATED_ATOMIC_OPS 1"
# `fence` performs a full memory barrier.
diff --git a/js/src/jit/shared/AtomicOperations-feeling-lucky-gcc.h b/js/src/jit/shared/AtomicOperations-feeling-lucky-gcc.h
index 2e38433..3954202 100644
--- a/js/src/jit/shared/AtomicOperations-feeling-lucky-gcc.h
+++ b/js/src/jit/shared/AtomicOperations-feeling-lucky-gcc.h
@@ -31,7 +31,10 @@
// Explicitly exclude tier-1 platforms.
#if (defined(__x86_64__) || defined(_M_X64) || defined(__i386__) || \
- defined(_M_IX86) || defined(__arm__) || defined(__aarch64__))
+ defined(_M_IX86) || defined(__aarch64__) || \
+ defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__) || \
+ defined(__ARM_ARCH_7R__) || defined(__ARM_ARCH_7M__) || \
+ defined(__ARM_ARCH_7EM__) || defined(_ARM_ARCH_7))
# error "Do not use on a tier-1 platform where inline assembly is available"
#endif
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