Re: armhf SIGILL, Illegal Instruction

[peter green <plugwash@p10link.net>]

As I understand it, there are two variants of "VFPv3", a version with 32 double registers (d0 to d31) and a version with only 16 double registers (d0 to d16).
The former is reffered to by gcc as "vfpv3" while the latter is reffered to by gcc as "vfpv3_d16".

Debian is supposed to support vfpv3_d16 but because there is relatively little hardware out there that doesn't support the extra registers bugs may take a while
to get noticed.

So IMO this is a bug in the compiler that is generating that code. What i'm not so sure about is whether selecting the correct compilation settings is the
responsibility of the frontend (ldc) or the backend (llvm).

On 29/09/2021 21:06, Ash Hughes wrote:
> Hi,
>
> I've been getting some programs terminated with SIGILL today, and I'm trying to find out if this is a package issue or if Debian (Bullseye) is no longer compatible with my ARM machine. I first got an error with onedrive, with gdb output:
>
> #0  0xb6948ca8 in gc.impl.conservative.gc.Gcx.fullcollect(bool) ()
>     from /usr/lib/arm-linux-gnueabihf/libdruntime-ldc-shared.so.94
>
> which is "vldr    d18, [pc, #216] ;".
>
> I then tried to run ldc2, and I got something similar:
>
> Core was generated by `ldc2 -c --output-o -conf= -w -mattr=-neon -O3 -release -relocation-model=pic -d'.
> Program terminated with signal SIGILL, Illegal instruction.
> #0  0x0089e15c in dmd.parse.Parser!(dmd.astcodegen.ASTCodegen).Parser.parsePrimaryExp() ()
>
> which is also a vldr instruction ("vldr    d16, [r6, #80]  ; 0x50")
>
> Finally, I tried to compile ldc2 myself and running it I got:
>
> #0  0xb4a6eabc in ?? () from /usr/lib/arm-linux-gnueabihf/libLLVM-11.so.1
>
> also vldr ("vldr        d16, [sp, #8]")
>
> It looks like the vldr instruction is being used in several LLVM packages, in a way my CPU doesn't like. Here's my cpuinfo:
>
> processor       : 0
> model name      : ARMv7 Processor rev 1 (v7l)
> BogoMIPS        : 37.39
> Features        : half thumb fastmult vfp edsp thumbee vfpv3 vfpv3d16 tls idivt
> CPU implementer : 0x56
> CPU architecture: 7
> CPU variant     : 0x1
> CPU part        : 0x581
> CPU revision    : 1
>
> Hardware        : Marvell Armada 370/XP (Device Tree)
> Revision        : 0000
> Serial          : 0000000000000000
>
> I don't have neon, although I think armhf doesn't require it, unless this has changed for Bullseye? If neon isn't required for Debian armhf, does this mean some LLVM related packages could be built differently to improve compatibility?
>
> Thanks,
>
> Ash