Hi, this is my first post to a mailing list, so correct me if i'm doing
something the bad way.
I have a Western Digital Sharespace.
The system on it is crap, so i wanted to put a debian on that stuff,
talking with another guy who did this, i need to compile a kernel.
Problem is: uboot doesn't load my kernel, it hangs after "Verifying
Checksum ... OK"
He gave me some code he added to the kernel in order to work on the
sharespace.
But some changes have been made to the kernel since then, and i needed
to make some modifications.
This is what i did (linux-3.2.2-sharespace.patch is attached to this
mail):
Installed crosstools from emdebian
# aptitude install gcc-4.4-arm-linux-gnueabi
$ wget
http://ftp.fr.debian.org/debian/pool/main/l/linux-2.6/linux-source-3.2_3.2.2-1_all.deb
$ dpkg -x linux-source-3.2_3.2.2-1_all.deb tmp
$ mv tmp/usr/src/linux-source-3.2.tar.bz2 ./
$ rm -R tmp
$ tar -xvjf linux-source-3.2.tar.bz2
$ cd linux-source-3.2
$ patch -p1 < ../linux-3.2.2-sharespace.patch
$ export ARCH=arm
$ export CROSS_COMPILE=arm-linux-gnueabi-
$ make orion5x_defconfig
$ make menuconfig
Here, i've set "System Type -> Orion Implementations -> Western Digital
Sharespace" to "y"
$ make uImage
Then i transferred uImage on the sharespace, restarted it, and stop
uboot in order to boot my new kernel.
Here is a printenv of uboot:
Marvell>> printenv
baudrate=115200
loads_echo=0
rootpath=/mnt/ARM_FS/
cpuName=926
bootargs=root=/dev/mtdblock2 console=ttyS0,115200 init=/etc/rc.preroot
mfgmodel=s6m4nc
CASset=min
MALLOC_len=1
ethprime=egiga0
netbsd_gw=192.168.0.254
netbsd_mask=255.255.255.0
netbsd_fs=nfs
netbsd_server=192.168.0.1
netbsd_rootdev=mgi0
netbsd_add=0x800000
netbsd_get=tftpboot $(netbsd_add) $(image_name)
netbsd_set_args=setenv bootargs nfsroot=$(netbsd_server):$(rootpath) fs=
$(netbsd_fs) ip=$(ipaddr) serverip=$(netbsd_server) )
netbsd_boot=bootm $(netbsd_add) $(bootargs)
netbsd_bootcmd=run netbsd_get ; run netbsd_set_args ; run netbsd_boot
bootargs_root=root=/dev/nfs rw
bootargs_end=:::DB88FXX81:egiga0:none
image_name=uImage
bootcmd=ide reset; bootm 0xFFCC0000
standalone=fsload 0x400000 $(image_name);setenv bootargs $(bootargs)
root=/dev/mtdblock0 rw ip=$(ipaddr):$(serverip)$(bootar;
eth1addr=00:00:00:00:51:82
usb0Mode=host
ethact=egiga0
ipaddr=192.168.1.2
serverip=192.168.1.100
serial_number=test0001
model=WVLXN
customer=Wendy
ethaddr=00:90:A9:5E:6F:6E
serialNo=WU4N19460055
modelname=WDA4NC40000
runintime=12000
ftpserver=192.168.43.4
testfile=100M
mkraid5=ok
mfgtest_state=final_tested_ok
extendDiskMode=extend
fw_ver=2.2.9
raidlevel=5
diskboot_addr=0x800000
diskboot_rd_addr=0x01100000
diskboot_root=root=/dev/sda1 rw
diskboot_console=console=ttyS0,115200
diskboot_settings=setenv bootargs $(diskboot_console) $(diskboot_root)
init=/bin/bash
diskboot_boot=bootm $(diskboot_addr)
diskboot_bootcmd=run diskboot_get ; run diskboot_settings ; run
diskboot_boot
diskboot_get=ide reset ; ext2load ide 3:1 $(diskboot_addr) /uImage
stdin=serial
stdout=serial
stderr=serial
enaDebugLed=yes
enaMonExt=no
enaFlashBuf=yes
enaCpuStream=no
enaVFP=yes
enaWrAllo=yes
enaICPref=yes
enaDCPref=yes
bootdelay=3
disaMvPnp=no
overEthAddr=no
So, i run diskboot_bootcmd, and here is what happens:
Marvell>> run diskboot_bootcmd
Reset IDE:
Marvell Serial ATA Adapter
Found adapter at bus 0, device 1 ... Scanning channels
Device 3: OK
Model: WDC WD10EAVS-00D7B1 Firm: 01.01A01 Ser#:
WD-WCAU44284270
Type: Hard Disk
Supports 48-bit addressing
Capacity: 953869.7 MB = 931.5 GB (1953525168 x 512)
2280584 bytes read
## Booting image at 00800000 ...
Image Name: linux-3.2.2-wdsharespace
Created: 2012-02-03 12:07:26 UTC
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size: 2280520 Bytes = 2.2 MB
Load Address: 00008000
Entry Point: 00008000
Verifying Checksum ... OK
Then it just hangs there, waited a long time (hours...)
Any idea of what is the problem?
diff -uNr linux-source-3.2/arch/arm/mach-orion5x/Kconfig linux-source-3.2-sharespace/arch/arm/mach-orion5x/Kconfig
--- linux-source-3.2/arch/arm/mach-orion5x/Kconfig 2012-01-26 00:39:32.000000000 +0000
+++ linux-source-3.2-sharespace/arch/arm/mach-orion5x/Kconfig 2012-02-02 12:13:58.728311030 +0000
@@ -155,6 +155,12 @@
Say 'Y' here if you want your kernel to support the
Marvell Orion-1-90 (88F6183) AP GE RD.
+config MACH_SHARESPACE
+ bool "Western Digital Sharespace"
+ help
+ Say 'Y' here if you want your kernel to support the
+ Western Digital Sharespace NAS.
+
endmenu
endif
diff -uNr linux-source-3.2/arch/arm/mach-orion5x/Makefile linux-source-3.2-sharespace/arch/arm/mach-orion5x/Makefile
--- linux-source-3.2/arch/arm/mach-orion5x/Makefile 2012-01-26 00:39:32.000000000 +0000
+++ linux-source-3.2-sharespace/arch/arm/mach-orion5x/Makefile 2012-02-02 12:16:10.955954008 +0000
@@ -22,3 +22,4 @@
obj-$(CONFIG_MACH_RD88F5181L_FXO) += rd88f5181l-fxo-setup.o
obj-$(CONFIG_MACH_RD88F6183AP_GE) += rd88f6183ap-ge-setup.o
obj-$(CONFIG_MACH_LINKSTATION_LSCHL) += ls-chl-setup.o
+obj-$(CONFIG_MACH_SHARESPACE) += sharespace-setup.o
diff -uNr linux-source-3.2/arch/arm/mach-orion5x/sharespace-setup.c linux-source-3.2-sharespace/arch/arm/mach-orion5x/sharespace-setup.c
--- linux-source-3.2/arch/arm/mach-orion5x/sharespace-setup.c 1970-01-01 00:00:00.000000000 +0000
+++ linux-source-3.2-sharespace/arch/arm/mach-orion5x/sharespace-setup.c 2012-02-02 13:27:12.748076237 +0000
@@ -0,0 +1,233 @@
+
+/*
+ * WD Sharespace setup
+ *
+ * Maintainer:
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/pci.h>
+#include <linux/irq.h>
+#include <linux/mtd/physmap.h>
+#include <linux/mtd/nand.h>
+#include <linux/mv643xx_eth.h>
+#include <linux/ethtool.h>
+#include <linux/gpio_keys.h>
+#include <linux/input.h>
+#include <linux/i2c.h>
+#include <linux/serial_reg.h>
+#include <linux/ata_platform.h>
+#include <asm/mach-types.h>
+#include <asm/gpio.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/pci.h>
+#include <mach/orion5x.h>
+#include "common.h"
+#include "mpp.h"
+
+/*
+ * 16MB NOR flash Device bus boot chip select
+ */
+
+#define SHARESPACE_NOR_BOOT_BASE 0xff000000
+#define SHARESPACE_NOR_BOOT_SIZE SZ_16M
+
+/****************************************************************************
+ * 16MiB NOR flash. The struct mtd_partition is not in the same order as the
+ * partitions on the device because we want to keep compatability with
+ * existing WD firmware.
+ *
+ * 0x00ca0000-0x00cc0000 : "Env-Var"
+ * 0x00e80000-0x00f80000 : "Pre-RootFS"
+ * 0x00cc0000-0x00e80000 : "Kernel"
+ * 0x00000000-0x00ca0000 : "Full-RootFS"
+ * 0x00f80000-0x01000000 : "U-Boot"
+ *
+ ***************************************************************************/
+static struct mtd_partition sharespace_partitions[] = {
+ {
+ .name = "U-Boot environment",
+ .size = 0x00020000,
+ .offset = 0x00ca0000,
+ .mask_flags = MTD_WRITEABLE,
+ }, {
+ .name = "Pre-RootFS",
+ .size = 0x00100000,
+ .offset = 0x00e80000,
+ }, {
+ .name = "Kernel",
+ .size = 0x001c0000,
+ .offset = 0x00cc0000,
+ }, {
+ .name = "Full RootFS",
+ .size = 0x00ca0000,
+ .offset = 0x00000000,
+ }, {
+ .name = "U-Boot",
+ .size = 0x00080000,
+ .offset = 0x00f80000,
+ .mask_flags = MTD_WRITEABLE,
+ },
+};
+
+static struct physmap_flash_data sharespace_nor_flash_data = {
+ .width = 1,
+ .parts = sharespace_partitions,
+ .nr_parts = ARRAY_SIZE(sharespace_partitions)
+};
+
+static struct resource sharespace_nor_flash_resource = {
+ .flags = IORESOURCE_MEM,
+ .start = SHARESPACE_NOR_BOOT_BASE,
+ .end = SHARESPACE_NOR_BOOT_BASE + SHARESPACE_NOR_BOOT_SIZE - 1,
+};
+
+static struct platform_device sharespace_nor_flash = {
+ .name = "physmap-flash",
+ .id = 0,
+ .dev = { .platform_data = &sharespace_nor_flash_data, },
+ .num_resources = 1,
+ .resource = &sharespace_nor_flash_resource,
+};
+
+/*****************************************************************************
+ * PCI Setup
+ ****************************************************************************/
+
+static int __init sharespace_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+ int irq;
+ /*
+ * Check for devices with hard-wired IRQs.
+ */
+ irq = orion5x_pci_map_irq(dev, slot, pin);
+ if (irq != -1)
+ return irq;
+
+ /* PCI is not used on the sharespace */
+ return -1;
+}
+
+static struct hw_pci sharespace_pci __initdata = {
+ .nr_controllers = 1,
+ .swizzle = pci_std_swizzle,
+ .setup = orion5x_pci_sys_setup,
+ .scan = orion5x_pci_sys_scan_bus,
+ .map_irq = sharespace_pci_map_irq,
+};
+
+static int __init sharespace_pci_init(void)
+{
+ if(machine_is_sharespace())
+ {
+ orion5x_pci_disable();
+ pci_common_init(&sharespace_pci);
+ }
+ return 0;
+}
+
+subsys_initcall(sharespace_pci_init);
+
+/*****************************************************************************
+ * RTC Setup
+ ****************************************************************************/
+#define SHARESPACE_RTC_GPIO 10
+
+static struct i2c_board_info __initdata sharespace_i2c_rtc = {
+ I2C_BOARD_INFO("pcf8563", 0x51),
+};
+
+/*****************************************************************************
+ * Ethernet
+ ****************************************************************************/
+
+static struct mv643xx_eth_platform_data sharespace_eth_data = {
+ .phy_addr = MV643XX_ETH_PHY_ADDR(8),
+};
+
+/*****************************************************************************
+ * MPP Setup
+ ****************************************************************************/
+static unsigned int sharespace_mpp_modes[] __initdata = {
+ MPP0_GPIO,
+ MPP1_GPIO, /* USB VBUS pin */
+ MPP2_GPIO, /* most of these are likely unused */
+ MPP3_GPIO,
+ MPP4_GPIO,
+ MPP5_GPIO,
+ MPP6_GPIO,
+ MPP7_GPIO,
+ MPP8_GPIO,
+ MPP9_GPIO,
+ MPP10_GPIO, /* RTC int */
+ MPP11_GPIO, /* Unknown - According to Marvell/WD this is BOARD_DEV_REF_CLCK ?? */
+ MPP12_GPIO, /* PCI 0 - not used */
+ MPP13_GPIO, /* PCI 1 - not used */
+ MPP14_GPIO,
+ MPP15_GPIO,
+ MPP16_UART, /* UART1 RXD ?? */
+ MPP17_UART, /* UART1 TXD ?? */
+ MPP18_UART, /* UART1 RXD ?? */
+ MPP19_UART, /* UART1 TXD ?? */
+ 0,
+};
+
+/*****************************************************************************
+ * General Setup
+ ****************************************************************************/
+
+static void __init sharespace_init(void)
+{
+ /*
+ * Setup basic Orion functions. Need to be called early.
+ */
+
+ orion5x_init();
+
+ orion5x_mpp_conf(sharespace_mpp_modes);
+
+ /*
+ * Device initialisation
+ */
+
+ orion5x_uart0_init();
+ orion5x_uart1_init();
+ orion5x_ehci0_init();
+ orion5x_eth_init(&sharespace_eth_data);
+ orion5x_i2c_init();
+
+ orion5x_setup_dev_boot_win(SHARESPACE_NOR_BOOT_BASE,
+ SHARESPACE_NOR_BOOT_SIZE);
+ platform_device_register(&sharespace_nor_flash);
+
+ /* Get RTC IRQ and register the chip*/
+ if (gpio_request(SHARESPACE_RTC_GPIO, "rtc") == 0)
+ {
+ if (gpio_direction_input(SHARESPACE_RTC_GPIO) == 0)
+ sharespace_i2c_rtc.irq = gpio_to_irq(SHARESPACE_RTC_GPIO);
+ else
+ gpio_free(SHARESPACE_RTC_GPIO);
+ }
+
+ if (sharespace_i2c_rtc.irq == 0)
+ pr_warning("sharespace_init: failed to get RTC IRQ\n");
+
+ i2c_register_board_info(0, &sharespace_i2c_rtc, 1);
+}
+
+MACHINE_START(SHARESPACE, "WD Sharespace")
+ .atag_offset = 0x100,
+ .init_machine = sharespace_init,
+ .map_io = orion5x_map_io,
+ .init_early = orion5x_init_early,
+ .init_irq = orion5x_init_irq,
+ .timer = &orion5x_timer,
+ .fixup = tag_fixup_mem32,
+MACHINE_END
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