Re: ARM EABI port: minimum CPU choice
On Monday 12 June 2006 15:19, Catalin Marinas wrote:
> On Mon, 2006-06-12 at 14:16 +0100, Paul Brook wrote:
> > > Martin pointed me to the AemEabiPort wiki page that suggests that the
> > > function return is "tst lr, #1; moveq pc, lr; bx lr" and this would
> > > work on ARMv4t as well.
> > >
> > > However, if the reason for this is to work on StrongARM (which doesn't
> > > support Thumb, AFAIK) you could ban the Thumb use on ARMv4(t) and a
> > > standard LDM or MOV PC, LR would return to Thumb code correctly on
> > > ARMv5t. Debian would be built in ARM mode anyway and Thumb
> > > interworking would only work correctly one ARMv5t (and later) cores.
> > Are you sure? I was under the impression that "mov pc, lr" was only
> > interworking safe on Armv7.
> You are right, but the "ldm" method is supported in ARMv5 and it could
> be used.
Agreed. We can use the ldm sequence when it's available. I guess whether it's
more efficient to force the operand to memory or to use the tst sequence may
depends on the context.