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Re: Debian ports for RiscPC, ARM710, etc.



Scott Bambrough <scottb@corelcomputer.com> writes:

> Yes.  They are automatically enabled with -mcpu=strongarm.  The NetWinder
> requires -march=armv4 to ensure some cpu cache issues are handled correctly,
> however, the cpu could be left as default.
> 
> > In the interests of portability, what would be the performance cost if
> > we somehow compiled things without the halfword instructions?  Do all
> > apps benefit, or just some specific ones?  Corel is using them for
> > their RPM-based distribution, so I have assumed that there is a
> > significant performance difference.
> 
> Not in my experience.  The halfword and signed byte instructions are only 
> emitted with -O2.  The basic code generator does not emit them, only the 
> optimizing pass.They are used to speed up access to shorts, and signed
> characters if I remember correctly.  They do speed things up, it takes 
> one two cpu cycles to access shorts without them and three to access 
> signed bytes if I recall correctly.    
> 
> I chose to configure gcc with -with-cpu=strongarm to generate code that
> would be most efficient on the NetWinder.

I think I may be confused about what constitutes a "RiscPC".

I thought they all had StrongARM CPUs, but I think I was wrong.
Acorn's web site isn't much help.

I see there is the Acorn RiscPC 600 series, Acorn RiscPC 700 series,
and then the Acorn StrongARM RiscPC.  I am guessing that the 600 and
700 series are using chips that only support the armv3 instruction
set?  If that's the case, then those are RiscPCs, but they can't
handle halfword instructions.  But the StrongARM RiscPC can handle the
halfword instructions, right?

I was getting confused when people said that RiscPCs couldn't handle
the halfword instructions, because I initially thought that all RiscPC
models were using the StrongARM.

If that's the case, then we have a pretty clean split between armv3
machines, and StrongARM machines (NetWinder, EBSA, and StrongARM
RiscPC).  Then the current Debian "arm" distribution should be work on
any StrongARM based machine, including the StrongARM RiscPC.  The
RiscPC 600, 700 and some older models will need to use the "armv3"
distribution.

Or do I still have it wrong?

Cheers,

 - Jim


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