Re: /proc/interrupts and reproducibility of FP caculations
Thank you very much.
On opteron
CPU0 CPU1
0: 92637094 967671 IO-APIC-edge timer
1: 5 0 IO-APIC-edge keyboard
2: 0 0 XT-PIC cascade
4: 6 0 IO-APIC-edge serial
12: 6 0 IO-APIC-edge PS/2 Mouse
24: 16364509 0 IO-APIC-level ioc0, eth0
25: 44 0 IO-APIC-level ioc1
NMI: 680196 684067
LOC: 93601300 93601301
ERR: 0
MIS: 0
On Xeon,
smxm26> cat /proc/inter*
CPU0 CPU1 CPU2 CPU3
0: 8024125 786031 0 0 IO-APIC-edge timer
1: 3 0 0 0 IO-APIC-edge keyboard
2: 0 0 0 0 XT-PIC cascade
4: 5 0 0 0 IO-APIC-edge serial
8: 3 0 0 0 IO-APIC-edge rtc
32: 265873 0 23072 0 IO-APIC-level aic79xx
33: 19818 0 0 8 IO-APIC-level aic79xx
54: 413452 0 0 0 IO-APIC-level eth0
NMI: 0 0 0 0
LOC: 8809689 8809736 8809746 8809747
ERR: 0
MIS: 0
Do you think that these outputs indicate all-right?
>From jwbaker@acm.org Fri Jul 18 11:30:05 2003
>On Wed, 2003-07-16 at 23:56, Sanzo Miyazawa wrote:
>> Does anyone undesrstand why the following things occur on my opteron?
>>
>> 1. I am running a 64 bit kernel on opteron, which I compiled
>> by "gcc-3.3 -m64" from a linux 2.4.21 obtained from x86-64.org.
>>
>> smk8m> cat /proc/version
>> Linux version 2.4.21-030702-k8-smp-64gb-devfs-raid-ext3 (root@smk8m) (gcc version 3.3 (Debian)) #1 SMP Sat Jul 5 07:53:12 JST 2003
>> smk8m> arch
>> x86_64
>>
>> The following is the output of /proc/interrupts.
>>
>> smk8m> cat /proc/inter*
>> CPU0 CPU1
>> 0: 85028306 0 IO-APIC-edge timer
>> 1: 5 0 IO-APIC-edge keyboard
>> 2: 0 0 XT-PIC cascade
>> 4: 6 0 IO-APIC-edge serial
>> 12: 6 0 IO-APIC-edge PS/2 Mouse
>> 24: 15249253 0 IO-APIC-level ioc0, eth0
>> 25: 44 0 IO-APIC-level ioc1
>> NMI: 667118 677988
>> LOC: 85025444 85025445
>> ERR: 0
>> MIS: 0
>>
>> Does anyone understand why only cpu0 is used for timer and ..?
>
>You need to use the "irqbalance" program, which is presently not
>packaged for Debian but can be downloaded here:
>
>http://people.redhat.com/arjanv/irqbalance/
>
>It is not well documented. Simply run it as root at system startup, and
>it becomes a deamon which periodically changes the CPU handling a
>certain interrupt.
>
>-jwb
>
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