[Date Prev][Date Next] [Thread Prev][Thread Next] [Date Index] [Thread Index]

Re: anyone running smp?



On Sun, 8 Dec 2002, Tom Vier wrote:

> > This is a long-known problem with 2.95.4; I know there must be archive
> > postings on this because I made some of them... ;-}
> >
> > Have you tried 3.0.4 on the same sources?
>
> just tried it. it works. 8) thanks. this should be added to the alpha faq.

I had the same problem with some UP2k's before (not all...go figure).

The odd part is that I tried to get a patch into the kernel source to
remove the code that 2.95.4 miscompiles (the code is totally unused
anyway), but it was rejected with no reason given.  I'm attaching the
patch for anyone who wants to try it.  So far, I've gotten nothing but
success stories out of it.  It's been awhile since I made the patch, so it
may apply fuzzy against the latest kernels, but it still should apply ok.

C

Index: arch/alpha/kernel/smp.c
===================================================================
RCS file: /home/cvs/linux-24/arch/alpha/kernel/smp.c,v
retrieving revision 1.1.1.4
retrieving revision 1.4
diff -u -r1.1.1.4 -r1.4
--- arch/alpha/kernel/smp.c	11 Oct 2001 15:41:35 -0000	1.1.1.4
+++ arch/alpha/kernel/smp.c	11 Oct 2001 15:51:36 -0000	1.4
@@ -80,7 +80,6 @@
 int smp_num_probed;		/* Internal processor count */
 int smp_num_cpus = 1;		/* Number that came online.  */
 int smp_threads_ready;		/* True once the per process idle is forked. */
-cycles_t cacheflush_time;

 int __cpu_number_map[NR_CPUS];
 int __cpu_logical_map[NR_CPUS];
@@ -212,63 +211,6 @@


 /*
- * Rough estimation for SMP scheduling, this is the number of cycles it
- * takes for a fully memory-limited process to flush the SMP-local cache.
- *
- * We are not told how much cache there is, so we have to guess.
- */
-static void __init
-smp_tune_scheduling (int cpuid)
-{
-	struct percpu_struct *cpu;
-	unsigned long on_chip_cache;
-	unsigned long freq;
-
-	cpu = (struct percpu_struct*)((char*)hwrpb + hwrpb->processor_offset
-				      + cpuid * hwrpb->processor_size);
-	switch (cpu->type)
-	{
-	case EV45_CPU:
-		on_chip_cache = 16 + 16;
-		break;
-
-	case EV5_CPU:
-	case EV56_CPU:
-		on_chip_cache = 8 + 8 + 96;
-		break;
-
-	case PCA56_CPU:
-		on_chip_cache = 16 + 8;
-		break;
-
-	case EV6_CPU:
-	case EV67_CPU:
-		on_chip_cache = 64 + 64;
-		break;
-
-	default:
-		on_chip_cache = 8 + 8;
-		break;
-	}
-
-	freq = hwrpb->cycle_freq ? : est_cycle_freq;
-
-#if 0
-	/* Magic estimation stolen from x86 port.  */
-	cacheflush_time = freq / 1024L * on_chip_cache / 5000L;
-
-        printk("Using heuristic of %d cycles.\n",
-               cacheflush_time);
-#else
-	/* Magic value to force potential preemption of other CPUs.  */
-	cacheflush_time = INT_MAX;
-
-        printk("Using heuristic of %d cycles.\n",
-               cacheflush_time);
-#endif
-}
-
-/*
  * Send a message to a secondary's console.  "START" is one such
  * interesting message.  ;-)
  */
@@ -607,7 +549,6 @@
 	current->processor = boot_cpuid;

 	smp_store_cpu_info(boot_cpuid);
-	smp_tune_scheduling(boot_cpuid);
 	smp_setup_percpu_timer(boot_cpuid);

 	init_idle();



Reply to: