Re: TLS support [was Re: Unidentified subject!]
On Mon, May 21, 2007 at 04:23:15PM +0200, Michael Schmitz wrote:
> > > >From my quick reading, we might have to sacrifice another register. Does
> > > this require any special handling at the kernel level?
> > >
> > > I'd look at the 386 implementation (SH seems a bit simpler but I do know
> > > squat about SH - anyone?)
> >
> > But I guess SH looks more like m68k than ia32, even if it's RISC ;-)
>
> Thanks; are you positive we will run into the same problems with large
> relocation offsets, then?
I don't think m68k would have issues with large relocation offsets. As
long as it doesn't support the pre-68020 chips, we have a lot of choices
of ways to handle large offsets. I presume we just need support for the
'020, '030, '040, and '060, or do I need to look at ColdFire as well?
I'd like to avoid following in the footsteps of the i386 style support
particularly because it does require more extensive kernel support than
most of the other architectures. I'm still looking over the documentation
and the implementation details of the other architectures, but I'll put
something together as a proposal before I write any code.
Brad Boyer
flar@allandria.com
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