Package: wnpp Severity: wishlist Owner: Bo YU <tsu.yubo@gmail.com> X-Debbugs-Cc: debian-devel@lists.debian.org, debian-riscv@lists.debian.org * Package name : qtrvsim Version : 0.9.7 Upstream Contact: pisa@cmp.felk.cvut.cz * URL : https://github.com/cvut/qtrvsim * License : GPL-3.0 Programming Lang: C++, Python, shell Description : RISC-V CPU simulator for education This is a widely recommended riscv emulator in the riscv community so I want to bring it to Debian also. The simulator accepts ELF statically linked executables compiled for RISC-V target (--march=rv64g). The simulator will automatically select endianness based on the ELF file header. Simulation will execute as XLEN=32 or XLEN=32 according to the ELF file header. 64-bit RISC-V ISA RV64IM and 32-bit RV32IM ELF executables are supported. Compressed instructions are not yet supported. You can use compile the code for simulation using specialized RISC-V GCC/Binutils toolchain (riscv32-elf) or using unified Clang/LLVM toolchain with LLD. -- Regards, -- Bo YU
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