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Bug#1041288: ITP: cocotb -- coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python



Package: wnpp
Severity: wishlist
Owner: أحمد المحمودي (Ahmed El-Mahmoudy) <aelmahmoudy@users.sourceforge.net>

* Package name    : cocotb
  Version         : 1.8.0
  Upstream Author : Chris Higgs, Stuart Hodgson <cocotb@lists.librecores.org>
* URL             : https://github.com/cocotb/cocotb
* License         : BSD
  Programming Lang: Python
  Description     : coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python

cocotb encourages the same philosophy of design re-use and randomized 
testing as UVM, however is implemented in Python.

With cocotb, VHDL or SystemVerilog are normally only used for the design 
itself, not the testbench.

cocotb has built-in support for integrating with continuous integration 
systems, such as Jenkins, GitLab, etc. through standardized, 
machine-readable test reporting formats.

cocotb was specifically designed to lower the overhead of creating a 
test.

cocotb automatically discovers tests so that no additional step is 
required to add a test to a regression.

All verification is done using Python

 - Intend to maintain it within Electronics team
 - Need a sponsor

-- 
‎أحمد المحمودي (Ahmed El-Mahmoudy)
 Digital design engineer
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