From: Bjorn Helgaas <bhelgaas@google.com>
We enabled ASPM too aggressively in v6.18-rc1. f3ac2ff14834 ("PCI/ASPM:
Enable all ClockPM and ASPM states for devicetree platforms") enabled ASPM
L0s, L1, and (if advertised) L1 PM Substates.
df5192d9bb0e ("PCI/ASPM: Enable only L0s and L1 for devicetree platforms")
(v6.18-rc3) backed off and omitted Clock PM and L1 Substates because we
don't have good infrastructure to discover CLKREQ# support, and L1
Substates may require device-specific configuration.
L0s and L1 are generically discoverable and should not require
device-specific support, but some devices advertise them even though they
don't work correctly. This series is a way to add quirks avoid L0s and L1
in this case.
Bjorn Helgaas (4):
PCI/ASPM: Cache L0s/L1 Supported so advertised link states can be
overridden
PCI/ASPM: Add pcie_aspm_remove_cap() to override advertised link
states
PCI/ASPM: Convert quirks to override advertised link states
PCI/ASPM: Avoid L0s and L1 on Freescale Root Ports
drivers/pci/pci.h | 2 ++
drivers/pci/pcie/aspm.c | 25 +++++++++++++++++--------
drivers/pci/probe.c | 7 +++++++
drivers/pci/quirks.c | 38 +++++++++++++++++++-------------------
include/linux/pci.h | 2 ++
5 files changed, 47 insertions(+), 27 deletions(-)