tag 633479 + patch
user debian-arm@lists.debian.org
usertags 633479 + eabi
usertags 633479 + armhf
thanks
Hello,
On Sun, Jul 10, 2011 at 08:17:46PM +0300, Konstantinos Margaritis wrote:
> Package: gcc-4.6
> Version: 4.6.1-2
> Severity: important
>
> Hi,
>
> gcc fails with an ICE on package oss4 on armhf:
>
> http://buildd.debian-ports.org/status/fetch.php?pkg=oss4&arch=armhf&ver=4.2-build2004-1&stamp=1310086627
>
> Attached is the smallest trimmed down file that is able to reproduce the ICE:
>
> $ gcc-4.6 -O ossplay_decode_pre.new.c -c -o ossplay_decode_pre.o
> ossplay_decode_pre.new.c: In function ‘decode_amplify’:
> ossplay_decode_pre.new.c:148:1: internal compiler error: in
> get_arm_condition_code, at config/arm/arm.c:17152
> Please submit a full bug report,
> with preprocessed source if appropriate.
> See <file:///usr/share/doc/gcc-4.6/README.Bugs> for instructions.
I have backported fix for PR49030 from upstream trunk to gcc-4.6 Debian package. (Note the backport fails to apply on gcc-4.5), let me know if it is worth to port it.
I have built a compiler for armel and armhf successfully which has lead me to successful builds for oss4 on armhf:
=> dpkg-genchanges >../oss4_4.2-build2005-1_armhf.changes
I am currently building mksh on armhf and it does not seem to show the ICE.
Please consider adding this fix for PR49030 on next upload.
Cheers,
--
Héctor Orón
diff -u gcc-4.6-4.6.2/debian/rules.patch gcc-4.6-4.6.2/debian/rules.patch
--- gcc-4.6-4.6.2/debian/rules.patch
+++ gcc-4.6-4.6.2/debian/rules.patch
@@ -85,6 +85,7 @@
libffi-powerpc-sf \
libffi-powerpc-sysv-without-string-ops \
arm-dynamic-linker \
+ pr49030 \
# $(if $(filter yes, $(DEB_CROSS)),,gcc-print-file-name) \
# libstdc++-nothumb-check \
diff -u gcc-4.6-4.6.2/debian/changelog gcc-4.6-4.6.2/debian/changelog
--- gcc-4.6-4.6.2/debian/changelog
+++ gcc-4.6-4.6.2/debian/changelog
@@ -1,3 +1,9 @@
+gcc-4.6 (4.6.2-5+armhf.1) unstable; urgency=low
+
+ * Fix PR target/49030.
+
+ -- Hector Oron <zumbi@debian.org> Wed, 23 Nov 2011 00:02:17 +0000
+
gcc-4.6 (4.6.2-5) unstable; urgency=low
* Update to SVN 20111121 (r181596) from the gcc-4_6-branch.
only in patch2:
unchanged:
--- gcc-4.6-4.6.2.orig/debian/patches/pr49030.diff
+++ gcc-4.6-4.6.2/debian/patches/pr49030.diff
@@ -0,0 +1,197 @@
+# DP: Fix GCC ICE
+
+gcc/
+ PR target/49030
+ * config/arm/arm-protos.h (maybe_get_arm_condition_code): Declare.
+ * config/arm/arm.c (maybe_get_arm_condition_code): New function,
+ reusing the old code from get_arm_condition_code. Return ARM_NV
+ for invalid comparison codes.
+ (get_arm_condition_code): Redefine in terms of
+ maybe_get_arm_condition_code.
+ * config/arm/predicates.md (arm_comparison_operator): Use
+ maybe_get_arm_condition_code.
+
+gcc/testsuite/
+ PR target/49030
+ * gcc.dg/torture/pr49030.c: New test.
+ PR target/49030
+ * gcc.dg/torture/pr49030.c: Run only if target int32plus.
+
+--- a/src/gcc/config/arm/arm.c 2011-11-22 23:17:59.405162471 +0000
++++ b/src/gcc/config/arm/arm.c 2011-11-22 23:28:36.321162194 +0000
+@@ -17022,10 +17022,10 @@
+ decremented/zeroed by arm_asm_output_opcode as the insns are output. */
+
+ /* Returns the index of the ARM condition code string in
+- `arm_condition_codes'. COMPARISON should be an rtx like
+- `(eq (...) (...))'. */
+-static enum arm_cond_code
+-get_arm_condition_code (rtx comparison)
++ `arm_condition_codes', or ARM_NV if the comparison is invalid.
++ COMPARISON should be an rtx like `(eq (...) (...))'. */
++enum arm_cond_code
++maybe_get_arm_condition_code (rtx comparison)
+ {
+ enum machine_mode mode = GET_MODE (XEXP (comparison, 0));
+ enum arm_cond_code code;
+@@ -17049,11 +17049,11 @@
+ case CC_DLTUmode: code = ARM_CC;
+
+ dominance:
+- gcc_assert (comp_code == EQ || comp_code == NE);
+-
+ if (comp_code == EQ)
+ return ARM_INVERSE_CONDITION_CODE (code);
+- return code;
++ if (comp_code == NE)
++ return code;
++ return ARM_NV;
+
+ case CC_NOOVmode:
+ switch (comp_code)
+@@ -17062,7 +17062,7 @@
+ case EQ: return ARM_EQ;
+ case GE: return ARM_PL;
+ case LT: return ARM_MI;
+- default: gcc_unreachable ();
++ default: return ARM_NV;
+ }
+
+ case CC_Zmode:
+@@ -17070,7 +17070,7 @@
+ {
+ case NE: return ARM_NE;
+ case EQ: return ARM_EQ;
+- default: gcc_unreachable ();
++ default: return ARM_NV;
+ }
+
+ case CC_Nmode:
+@@ -17078,7 +17078,7 @@
+ {
+ case NE: return ARM_MI;
+ case EQ: return ARM_PL;
+- default: gcc_unreachable ();
++ default: return ARM_NV;
+ }
+
+ case CCFPEmode:
+@@ -17103,7 +17103,7 @@
+ /* UNEQ and LTGT do not have a representation. */
+ case UNEQ: /* Fall through. */
+ case LTGT: /* Fall through. */
+- default: gcc_unreachable ();
++ default: return ARM_NV;
+ }
+
+ case CC_SWPmode:
+@@ -17119,7 +17119,7 @@
+ case GTU: return ARM_CC;
+ case LEU: return ARM_CS;
+ case LTU: return ARM_HI;
+- default: gcc_unreachable ();
++ default: return ARM_NV;
+ }
+
+ case CC_Cmode:
+@@ -17127,7 +17127,7 @@
+ {
+ case LTU: return ARM_CS;
+ case GEU: return ARM_CC;
+- default: gcc_unreachable ();
++ default: return ARM_NV;
+ }
+
+ case CC_CZmode:
+@@ -17139,7 +17139,7 @@
+ case GTU: return ARM_HI;
+ case LEU: return ARM_LS;
+ case LTU: return ARM_CC;
+- default: gcc_unreachable ();
++ default: return ARM_NV;
+ }
+
+ case CC_NCVmode:
+@@ -17149,7 +17149,7 @@
+ case LT: return ARM_LT;
+ case GEU: return ARM_CS;
+ case LTU: return ARM_CC;
+- default: gcc_unreachable ();
++ default: return ARM_NV;
+ }
+
+ case CCmode:
+@@ -17165,13 +17165,22 @@
+ case GTU: return ARM_HI;
+ case LEU: return ARM_LS;
+ case LTU: return ARM_CC;
+- default: gcc_unreachable ();
++ default: return ARM_NV;
+ }
+
+ default: gcc_unreachable ();
+ }
+ }
+
++/* Like maybe_get_arm_condition_code, but never return ARM_NV. */
++static enum arm_cond_code
++get_arm_condition_code (rtx comparison)
++{
++ enum arm_cond_code code = maybe_get_arm_condition_code (comparison);
++ gcc_assert (code != ARM_NV);
++ return code;
++}
++
+ /* Tell arm_asm_output_opcode to output IT blocks for conditionally executed
+ instructions. */
+ void
+--- a/src/gcc/config/arm/arm-protos.h 2011-01-29 03:20:57.000000000 +0000
++++ b/src/gcc/config/arm/arm-protos.h 2011-11-22 23:29:22.845162175 +0000
+@@ -175,6 +175,7 @@
+ #endif
+ extern int thumb_shiftable_const (unsigned HOST_WIDE_INT);
+ #ifdef RTX_CODE
++extern enum arm_cond_code maybe_get_arm_condition_code (rtx);
+ extern void thumb1_final_prescan_insn (rtx);
+ extern void thumb2_final_prescan_insn (rtx);
+ extern const char *thumb_load_double_from_address (rtx *);
+--- a/src/gcc/config/arm/predicates.md 2011-07-06 13:38:26.000000000 +0100
++++ b/src/gcc/config/arm/predicates.md 2011-11-22 23:27:48.493162214 +0000
+@@ -242,10 +242,9 @@
+ ;; True for integer comparisons and, if FP is active, for comparisons
+ ;; other than LTGT or UNEQ.
+ (define_special_predicate "arm_comparison_operator"
+- (ior (match_code "eq,ne,le,lt,ge,gt,geu,gtu,leu,ltu")
+- (and (match_test "TARGET_32BIT && TARGET_HARD_FLOAT
+- && (TARGET_FPA || TARGET_VFP)")
+- (match_code "unordered,ordered,unlt,unle,unge,ungt"))))
++ (and (match_code "eq,ne,le,lt,ge,gt,geu,gtu,leu,ltu,
++ unordered,ordered,unlt,unle,unge,ungt")
++ (match_test "maybe_get_arm_condition_code (op) != ARM_NV")))
+
+ (define_special_predicate "lt_ge_comparison_operator"
+ (match_code "lt,ge"))
+--- a/src/gcc/testsuite/gcc.dg/torture/pr49030.c 1970-01-01 01:00:00.000000000 +0100
++++ b/src/gcc/testsuite/gcc.dg/torture/pr49030.c 2011-11-22 23:29:51.161162161 +0000
+@@ -0,0 +1,21 @@
++/* { dg-require-effective-target int32plus } */
++
++void
++sample_move_d32u24_sS (char *dst, float *src, unsigned long nsamples,
++ unsigned long dst_skip)
++{
++ long long y;
++ while (nsamples--)
++ {
++ y = (long long) (*src * 8388608.0f) << 8;
++ if (y > 2147483647) {
++ *(int *) dst = 2147483647;
++ } else if (y < -2147483647 - 1) {
++ *(int *) dst = -2147483647 - 1;
++ } else {
++ *(int *) dst = (int) y;
++ }
++ dst += dst_skip;
++ src++;
++ }
++}
Attachment:
signature.asc
Description: Digital signature