libdrm: Changes to 'upstream-experimental'
.gitignore | 1
configure.ac | 18
include/drm/drm.h | 2
include/drm/drm_mode.h | 37
include/drm/i915_drm.h | 5
intel/intel_bufmgr.c | 20
intel/intel_bufmgr.h | 4
intel/intel_bufmgr_fake.c | 4
intel/intel_bufmgr_gem.c | 199 -
intel/intel_bufmgr_priv.h | 14
libdrm.pc.in | 2
libkms/Makefile.am | 3
nouveau/Makefile.am | 1
nouveau/nouveau_class.h | 9019 ----------------------------------------------
radeon/Makefile.am | 4
radeon/bof.c | 477 ++
radeon/bof.h | 90
radeon/radeon_cs.h | 2
radeon/radeon_cs_gem.c | 102
tests/Makefile.am | 10
tests/vbltest/Makefile.am | 11
tests/vbltest/vbltest.c | 188
xf86atomic.h | 4
23 files changed, 1112 insertions(+), 9105 deletions(-)
New commits:
commit 65ec8d7699267cc59777d531f545a82a14341480
Author: Eric Anholt <eric@anholt.net>
Date: Thu Jun 10 08:59:05 2010 -0700
Bump version to 2.4.21 for release.
diff --git a/configure.ac b/configure.ac
index e953199..62db817 100644
--- a/configure.ac
+++ b/configure.ac
@@ -19,7 +19,7 @@
# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
AC_PREREQ(2.60)
-AC_INIT([libdrm], 2.4.20, [dri-devel@lists.sourceforge.net], libdrm)
+AC_INIT([libdrm], 2.4.21, [dri-devel@lists.sourceforge.net], libdrm)
AC_USE_SYSTEM_EXTENSIONS
AC_CONFIG_SRCDIR([Makefile.am])
AM_INIT_AUTOMAKE([dist-bzip2])
commit b8c4e5836cf1eff3e8c666f24567bd4c2fa31140
Author: Eric Anholt <eric@anholt.net>
Date: Thu Jun 10 09:03:41 2010 -0700
Fix radeon distcheck.
diff --git a/radeon/Makefile.am b/radeon/Makefile.am
index 03b5040..dc94b5f 100644
--- a/radeon/Makefile.am
+++ b/radeon/Makefile.am
@@ -40,7 +40,8 @@ libdrm_radeon_la_SOURCES = \
radeon_cs_space.c \
radeon_bo.c \
radeon_cs.c \
- bof.c
+ bof.c \
+ bof.h
libdrm_radeonincludedir = ${includedir}/libdrm
libdrm_radeoninclude_HEADERS = \
commit 4f7704aea76b3d93d997d2ff815541d0ac373535
Author: Eric Anholt <eric@anholt.net>
Date: Thu Jun 10 08:58:08 2010 -0700
intel: Fix several other paths for buffers pointing at themselves.
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index 33f9b44..a8e072d 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -859,9 +859,11 @@ drm_intel_gem_bo_unreference_final(drm_intel_bo *bo, time_t time)
/* Unreference all the target buffers */
for (i = 0; i < bo_gem->reloc_count; i++) {
- drm_intel_gem_bo_unreference_locked_timed(bo_gem->
- reloc_target_info[i].bo,
- time);
+ if (bo_gem->reloc_target_info[i].bo != bo) {
+ drm_intel_gem_bo_unreference_locked_timed(bo_gem->
+ reloc_target_info[i].bo,
+ time);
+ }
}
bo_gem->reloc_count = 0;
bo_gem->used_as_reloc_target = 0;
@@ -1345,7 +1347,8 @@ do_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset,
bo_gem->relocs[bo_gem->reloc_count].presumed_offset = target_bo->offset;
bo_gem->reloc_target_info[bo_gem->reloc_count].bo = target_bo;
- drm_intel_gem_bo_reference(target_bo);
+ if (target_bo != bo)
+ drm_intel_gem_bo_reference(target_bo);
if (need_fence)
bo_gem->reloc_target_info[bo_gem->reloc_count].flags =
DRM_INTEL_RELOC_FENCE;
@@ -1967,6 +1970,8 @@ _drm_intel_gem_bo_references(drm_intel_bo *bo, drm_intel_bo *target_bo)
for (i = 0; i < bo_gem->reloc_count; i++) {
if (bo_gem->reloc_target_info[i].bo == target_bo)
return 1;
+ if (bo == bo_gem->reloc_target_info[i].bo)
+ continue;
if (_drm_intel_gem_bo_references(bo_gem->reloc_target_info[i].bo,
target_bo))
return 1;
commit 0ec768e67aec8b1ded9bcf575ad1c0beb28cc0ca
Author: Eric Anholt <eric@anholt.net>
Date: Fri Jun 4 17:09:11 2010 -0700
intel: Add more intermediate sizes of cache buckets between powers of 2.
We had two cases recently where the rounding to powers of two hurt
badly: 4:2:0 YUV HD video frames would round up from 2.2MB to 4MB, and
Urban Terror was hitting aperture size limitations. For UT, this is
because mipmap trees for power of two texture sizes will land right in
the middle between two cache buckets.
By giving a few more sizes between powers of two, Urban Terror on my
945 ends up consuming 207MB of GEM objects instead of 272MB, and HD
video decode on Ironlake goes from 99MB to 75MB.
cairo-perf-diff of the benchmarks for gl and xlib shows a 1.09x and
1.06x speedup and a 1.07x, 1.08x, and 1.11x slowdown. From this, I
think this patch was really a no-op in terms of performance for these
CPU-bound workloads.
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index 861cf0e..33f9b44 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -66,6 +66,8 @@
fprintf(stderr, __VA_ARGS__); \
} while (0)
+#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
+
typedef struct _drm_intel_bo_gem drm_intel_bo_gem;
struct drm_intel_gem_bo_bucket {
@@ -73,10 +75,6 @@ struct drm_intel_gem_bo_bucket {
unsigned long size;
};
-/* Only cache objects up to 64MB. Bigger than that, and the rounding of the
- * size makes many operations fail that wouldn't otherwise.
- */
-#define DRM_INTEL_GEM_BO_BUCKETS 14
typedef struct _drm_intel_bufmgr_gem {
drm_intel_bufmgr bufmgr;
@@ -93,7 +91,8 @@ typedef struct _drm_intel_bufmgr_gem {
int exec_count;
/** Array of lists of cached gem objects of power-of-two sizes */
- struct drm_intel_gem_bo_bucket cache_bucket[DRM_INTEL_GEM_BO_BUCKETS];
+ struct drm_intel_gem_bo_bucket cache_bucket[14 * 4];
+ int num_buckets;
uint64_t gtt_size;
int available_fences;
@@ -285,7 +284,7 @@ drm_intel_gem_bo_bucket_for_size(drm_intel_bufmgr_gem *bufmgr_gem,
{
int i;
- for (i = 0; i < DRM_INTEL_GEM_BO_BUCKETS; i++) {
+ for (i = 0; i < bufmgr_gem->num_buckets; i++) {
struct drm_intel_gem_bo_bucket *bucket =
&bufmgr_gem->cache_bucket[i];
if (bucket->size >= size) {
@@ -830,7 +829,7 @@ drm_intel_gem_cleanup_bo_cache(drm_intel_bufmgr_gem *bufmgr_gem, time_t time)
{
int i;
- for (i = 0; i < DRM_INTEL_GEM_BO_BUCKETS; i++) {
+ for (i = 0; i < bufmgr_gem->num_buckets; i++) {
struct drm_intel_gem_bo_bucket *bucket =
&bufmgr_gem->cache_bucket[i];
@@ -1258,7 +1257,7 @@ drm_intel_bufmgr_gem_destroy(drm_intel_bufmgr *bufmgr)
pthread_mutex_destroy(&bufmgr_gem->lock);
/* Free any cached buffer objects we were going to reuse */
- for (i = 0; i < DRM_INTEL_GEM_BO_BUCKETS; i++) {
+ for (i = 0; i < bufmgr_gem->num_buckets; i++) {
struct drm_intel_gem_bo_bucket *bucket =
&bufmgr_gem->cache_bucket[i];
drm_intel_bo_gem *bo_gem;
@@ -1989,6 +1988,45 @@ drm_intel_gem_bo_references(drm_intel_bo *bo, drm_intel_bo *target_bo)
return 0;
}
+static void
+add_bucket(drm_intel_bufmgr_gem *bufmgr_gem, int size)
+{
+ unsigned int i = bufmgr_gem->num_buckets;
+
+ assert(i < ARRAY_SIZE(bufmgr_gem->cache_bucket));
+
+ DRMINITLISTHEAD(&bufmgr_gem->cache_bucket[i].head);
+ bufmgr_gem->cache_bucket[i].size = size;
+ bufmgr_gem->num_buckets++;
+}
+
+static void
+init_cache_buckets(drm_intel_bufmgr_gem *bufmgr_gem)
+{
+ unsigned long size, cache_max_size = 64 * 1024 * 1024;
+
+ /* OK, so power of two buckets was too wasteful of memory.
+ * Give 3 other sizes between each power of two, to hopefully
+ * cover things accurately enough. (The alternative is
+ * probably to just go for exact matching of sizes, and assume
+ * that for things like composited window resize the tiled
+ * width/height alignment and rounding of sizes to pages will
+ * get us useful cache hit rates anyway)
+ */
+ add_bucket(bufmgr_gem, 4096);
+ add_bucket(bufmgr_gem, 4096 * 2);
+ add_bucket(bufmgr_gem, 4096 * 3);
+
+ /* Initialize the linked lists for BO reuse cache. */
+ for (size = 4 * 4096; size <= cache_max_size; size *= 2) {
+ add_bucket(bufmgr_gem, size);
+
+ add_bucket(bufmgr_gem, size + size * 1 / 4);
+ add_bucket(bufmgr_gem, size + size * 2 / 4);
+ add_bucket(bufmgr_gem, size + size * 3 / 4);
+ }
+}
+
/**
* Initializes the GEM buffer manager, which uses the kernel to allocate, map,
* and manage map buffer objections.
@@ -2001,8 +2039,7 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size)
drm_intel_bufmgr_gem *bufmgr_gem;
struct drm_i915_gem_get_aperture aperture;
drm_i915_getparam_t gp;
- int ret, i;
- unsigned long size;
+ int ret;
int exec2 = 0, has_bsd = 0;
bufmgr_gem = calloc(1, sizeof(*bufmgr_gem));
@@ -2128,11 +2165,7 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size)
drm_intel_gem_get_pipe_from_crtc_id;
bufmgr_gem->bufmgr.bo_references = drm_intel_gem_bo_references;
- /* Initialize the linked lists for BO reuse cache. */
- for (i = 0, size = 4096; i < DRM_INTEL_GEM_BO_BUCKETS; i++, size *= 2) {
- DRMINITLISTHEAD(&bufmgr_gem->cache_bucket[i].head);
- bufmgr_gem->cache_bucket[i].size = size;
- }
+ init_cache_buckets(bufmgr_gem);
return &bufmgr_gem->bufmgr;
}
commit e65caeba9ed0e6c53830d944248aaae2228351ab
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date: Wed Jun 9 10:08:41 2010 +0100
intel: Convert to untiled pitches if surface is too large for tiling.
If the pitch is too large for the hardware to tile, recompute the
required surface size based on the untiled pitch and alignments. For the
older hardware, which has smaller limits and greater restrictions, this
may be a considerable saving in allocation size.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index b125c12..861cf0e 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -689,31 +689,39 @@ drm_intel_gem_bo_alloc_tiled(drm_intel_bufmgr *bufmgr, const char *name,
{
drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *)bufmgr;
drm_intel_bo *bo;
- unsigned long size, stride, aligned_y = y;
+ unsigned long size, stride;
+ uint32_t tiling;
int ret;
- /* If we're tiled, our allocations are in 8 or 32-row blocks,
- * so failure to align our height means that we won't allocate
- * enough pages.
- *
- * If we're untiled, we still have to align to 2 rows high
- * because the data port accesses 2x2 blocks even if the
- * bottom row isn't to be rendered, so failure to align means
- * we could walk off the end of the GTT and fault. This is
- * documented on 965, and may be the case on older chipsets
- * too so we try to be careful.
- */
- if (*tiling_mode == I915_TILING_NONE)
- aligned_y = ALIGN(y, 2);
- else if (*tiling_mode == I915_TILING_X)
- aligned_y = ALIGN(y, 8);
- else if (*tiling_mode == I915_TILING_Y)
- aligned_y = ALIGN(y, 32);
-
- stride = x * cpp;
- stride = drm_intel_gem_bo_tile_pitch(bufmgr_gem, stride, *tiling_mode);
- size = stride * aligned_y;
- size = drm_intel_gem_bo_tile_size(bufmgr_gem, size, tiling_mode);
+ do {
+ unsigned long aligned_y;
+
+ tiling = *tiling_mode;
+
+ /* If we're tiled, our allocations are in 8 or 32-row blocks,
+ * so failure to align our height means that we won't allocate
+ * enough pages.
+ *
+ * If we're untiled, we still have to align to 2 rows high
+ * because the data port accesses 2x2 blocks even if the
+ * bottom row isn't to be rendered, so failure to align means
+ * we could walk off the end of the GTT and fault. This is
+ * documented on 965, and may be the case on older chipsets
+ * too so we try to be careful.
+ */
+ aligned_y = y;
+ if (tiling == I915_TILING_NONE)
+ aligned_y = ALIGN(y, 2);
+ else if (tiling == I915_TILING_X)
+ aligned_y = ALIGN(y, 8);
+ else if (tiling == I915_TILING_Y)
+ aligned_y = ALIGN(y, 32);
+
+ stride = x * cpp;
+ stride = drm_intel_gem_bo_tile_pitch(bufmgr_gem, stride, tiling);
+ size = stride * aligned_y;
+ size = drm_intel_gem_bo_tile_size(bufmgr_gem, size, tiling_mode);
+ } while (*tiling_mode != tiling);
bo = drm_intel_gem_bo_alloc_internal(bufmgr, name, size, flags);
if (!bo)
commit f179137f8f5bf272b79266575121c7a04038290c
Author: Eric Anholt <eric@anholt.net>
Date: Mon Jun 7 14:22:36 2010 -0700
Allow a buffer to point at itself and still get relocs.
I'm using this in experiments with the i965 Mesa driver.
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index 398c7d0..b125c12 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -1316,7 +1316,10 @@ do_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset,
* already been accounted for.
*/
assert(!bo_gem->used_as_reloc_target);
- bo_gem->reloc_tree_size += target_bo_gem->reloc_tree_size;
+ if (target_bo_gem != bo_gem) {
+ target_bo_gem->used_as_reloc_target = 1;
+ bo_gem->reloc_tree_size += target_bo_gem->reloc_tree_size;
+ }
/* An object needing a fence is a tiled buffer, so it won't have
* relocs to other buffers.
*/
@@ -1325,7 +1328,6 @@ do_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset,
bo_gem->reloc_tree_fences += target_bo_gem->reloc_tree_fences;
/* Flag the target to disallow further relocations in it. */
- target_bo_gem->used_as_reloc_target = 1;
bo_gem->relocs[bo_gem->reloc_count].offset = offset;
bo_gem->relocs[bo_gem->reloc_count].delta = target_offset;
@@ -1387,6 +1389,9 @@ drm_intel_gem_bo_process_reloc(drm_intel_bo *bo)
for (i = 0; i < bo_gem->reloc_count; i++) {
drm_intel_bo *target_bo = bo_gem->reloc_target_info[i].bo;
+ if (target_bo == bo)
+ continue;
+
/* Continue walking the tree depth-first. */
drm_intel_gem_bo_process_reloc(target_bo);
@@ -1408,6 +1413,9 @@ drm_intel_gem_bo_process_reloc2(drm_intel_bo *bo)
drm_intel_bo *target_bo = bo_gem->reloc_target_info[i].bo;
int need_fence;
+ if (target_bo == bo)
+ continue;
+
/* Continue walking the tree depth-first. */
drm_intel_gem_bo_process_reloc2(target_bo);
commit 66375fd6e8d3e95df5d124883a1426460c1b8ed8
Author: Zou Nan hai <nanhai.zou@intel.com>
Date: Wed Jun 2 10:07:37 2010 +0800
intel: Add support for kernel multi-ringbuffer API.
This introduces a new API to exec on BSD ring buffer, for H.264 VLD
decoding.
Signed-off-by: Xiang Hai hao <haihao.xiang@intel.com>
Signed-off-by: Zou Nan hai <nanhai.zou@intel.com>
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index c8cb3a6..c040afa 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -275,6 +275,7 @@ typedef struct drm_i915_irq_wait {
#define I915_PARAM_HAS_OVERLAY 7
#define I915_PARAM_HAS_PAGEFLIPPING 8
#define I915_PARAM_HAS_EXECBUF2 9
+#define I915_PARAM_HAS_BSD 10
typedef struct drm_i915_getparam {
int param;
@@ -616,7 +617,9 @@ struct drm_i915_gem_execbuffer2 {
__u32 num_cliprects;
/** This is a struct drm_clip_rect *cliprects */
__u64 cliprects_ptr;
- __u64 flags; /* currently unused */
+#define I915_EXEC_RENDER (1 << 0)
+#define I915_EXEC_BSD (1 << 1)
+ __u64 flags;
__u64 rsvd1;
__u64 rsvd2;
};
diff --git a/intel/intel_bufmgr.c b/intel/intel_bufmgr.c
index 9144fdd..2b4e888 100644
--- a/intel/intel_bufmgr.c
+++ b/intel/intel_bufmgr.c
@@ -145,6 +145,19 @@ drm_intel_bo_exec(drm_intel_bo *bo, int used,
return bo->bufmgr->bo_exec(bo, used, cliprects, num_cliprects, DR4);
}
+int
+drm_intel_bo_mrb_exec(drm_intel_bo *bo, int used,
+ drm_clip_rect_t *cliprects, int num_cliprects, int DR4,
+ int ring_flag)
+{
+ if (bo->bufmgr->bo_mrb_exec)
+ return bo->bufmgr->bo_mrb_exec(bo, used,
+ cliprects, num_cliprects, DR4,
+ ring_flag);
+
+ return -ENODEV;
+}
+
void drm_intel_bufmgr_set_debug(drm_intel_bufmgr *bufmgr, int enable_debug)
{
bufmgr->debug = enable_debug;
diff --git a/intel/intel_bufmgr.h b/intel/intel_bufmgr.h
index cbcddb6..65fd603 100644
--- a/intel/intel_bufmgr.h
+++ b/intel/intel_bufmgr.h
@@ -106,6 +106,9 @@ void drm_intel_bufmgr_set_debug(drm_intel_bufmgr *bufmgr, int enable_debug);
void drm_intel_bufmgr_destroy(drm_intel_bufmgr *bufmgr);
int drm_intel_bo_exec(drm_intel_bo *bo, int used,
drm_clip_rect_t * cliprects, int num_cliprects, int DR4);
+int drm_intel_bo_mrb_exec(drm_intel_bo *bo, int used,
+ drm_clip_rect_t *cliprects, int num_cliprects, int DR4,
+ int ring_flag);
int drm_intel_bufmgr_check_aperture_space(drm_intel_bo ** bo_array, int count);
int drm_intel_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset,
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index b76fd7e..398c7d0 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -1530,14 +1530,17 @@ drm_intel_gem_bo_exec(drm_intel_bo *bo, int used,
}
static int
-drm_intel_gem_bo_exec2(drm_intel_bo *bo, int used,
- drm_clip_rect_t *cliprects, int num_cliprects,
- int DR4)
+drm_intel_gem_bo_mrb_exec2(drm_intel_bo *bo, int used,
+ drm_clip_rect_t *cliprects, int num_cliprects, int DR4,
+ int ring_flag)
{
drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *)bo->bufmgr;
struct drm_i915_gem_execbuffer2 execbuf;
int ret, i;
+ if ((ring_flag != I915_EXEC_RENDER) && (ring_flag != I915_EXEC_BSD))
+ return -EINVAL;
+
pthread_mutex_lock(&bufmgr_gem->lock);
/* Update indices and set up the validate list. */
drm_intel_gem_bo_process_reloc2(bo);
@@ -1555,7 +1558,7 @@ drm_intel_gem_bo_exec2(drm_intel_bo *bo, int used,
execbuf.num_cliprects = num_cliprects;
execbuf.DR1 = 0;
execbuf.DR4 = DR4;
- execbuf.flags = 0;
+ execbuf.flags = ring_flag;
execbuf.rsvd1 = 0;
execbuf.rsvd2 = 0;
@@ -1597,6 +1600,16 @@ drm_intel_gem_bo_exec2(drm_intel_bo *bo, int used,
}
static int
+drm_intel_gem_bo_exec2(drm_intel_bo *bo, int used,
+ drm_clip_rect_t *cliprects, int num_cliprects,
+ int DR4)
+{
+ return drm_intel_gem_bo_mrb_exec2(bo, used,
+ cliprects, num_cliprects, DR4,
+ I915_EXEC_RENDER);
+}
+
+static int
drm_intel_gem_bo_pin(drm_intel_bo *bo, uint32_t alignment)
{
drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr;
@@ -1974,7 +1987,7 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size)
drm_i915_getparam_t gp;
int ret, i;
unsigned long size;
- int exec2 = 0;
+ int exec2 = 0, has_bsd = 0;
bufmgr_gem = calloc(1, sizeof(*bufmgr_gem));
if (bufmgr_gem == NULL)
@@ -2023,6 +2036,11 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size)
if (!ret)
exec2 = 1;
+ gp.param = I915_PARAM_HAS_BSD;
+ ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp);
+ if (!ret)
+ has_bsd = 1;
+
if (bufmgr_gem->gen < 4) {
gp.param = I915_PARAM_NUM_FENCES_AVAIL;
gp.value = &bufmgr_gem->available_fences;
@@ -2076,9 +2094,11 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size)
bufmgr_gem->bufmgr.bo_set_tiling = drm_intel_gem_bo_set_tiling;
bufmgr_gem->bufmgr.bo_flink = drm_intel_gem_bo_flink;
/* Use the new one if available */
- if (exec2)
+ if (exec2) {
bufmgr_gem->bufmgr.bo_exec = drm_intel_gem_bo_exec2;
- else
+ if (has_bsd)
+ bufmgr_gem->bufmgr.bo_mrb_exec = drm_intel_gem_bo_mrb_exec2;
+ } else
bufmgr_gem->bufmgr.bo_exec = drm_intel_gem_bo_exec;
bufmgr_gem->bufmgr.bo_busy = drm_intel_gem_bo_busy;
bufmgr_gem->bufmgr.bo_madvise = drm_intel_gem_bo_madvise;
diff --git a/intel/intel_bufmgr_priv.h b/intel/intel_bufmgr_priv.h
index f987d97..87e91e7 100644
--- a/intel/intel_bufmgr_priv.h
+++ b/intel/intel_bufmgr_priv.h
@@ -173,6 +173,13 @@ struct _drm_intel_bufmgr {
drm_clip_rect_t *cliprects, int num_cliprects,
int DR4);
+ /** Executes the command buffer pointed to by bo on the selected
+ * ring buffer
+ */
+ int (*bo_mrb_exec) (drm_intel_bo *bo, int used,
+ drm_clip_rect_t *cliprects, int num_cliprects,
+ int DR4, int ring_flag);
+
/**
* Pin a buffer to the aperture and fix the offset until unpinned
*
commit 73a42a645201a85ce2fe4fc77754df67e5097fc9
Author: Jesse Barnes <jbarnes@jbarnes-asus.(none)>
Date: Wed Jun 2 18:27:24 2010 -0700
add vbltest to .gitignore
diff --git a/.gitignore b/.gitignore
index 5f9c1fa..243457e 100644
--- a/.gitignore
+++ b/.gitignore
@@ -75,3 +75,4 @@ tests/updatedraw
tests/modeprint/modeprint
tests/modetest/modetest
tests/kmstest/kmstest
+tests/vbltest/vbltest
commit ae57dcf6e063860200b7949d5e2365e80ac4aea7
Author: Daniel Stone <daniel@fooishbar.org>
Date: Tue Jun 1 19:23:42 2010 +0100
libkms: Fix include paths
Otherwise xf86drm.h isn't found, or the wrong one.
diff --git a/libkms/Makefile.am b/libkms/Makefile.am
index 0375ae4..2c75878 100644
--- a/libkms/Makefile.am
+++ b/libkms/Makefile.am
@@ -1,6 +1,7 @@
AM_CFLAGS = \
$(WARN_CFLAGS) \
- -I$(top_srcdir)/include/drm
+ -I$(top_srcdir)/include/drm \
+ -I$(top_srcdir)
libkms_la_LTLIBRARIES = libkms.la
libkms_ladir = $(libdir)
commit 607e228c263d5d171bd0615d5d93202dda371e5f
Author: Eric Anholt <eric@anholt.net>
Date: Tue May 25 20:13:37 2010 -0700
Enable silent automake rules.
diff --git a/configure.ac b/configure.ac
index bc76603..e953199 100644
--- a/configure.ac
+++ b/configure.ac
@@ -34,6 +34,9 @@ AC_HEADER_STDC
AC_SYS_LARGEFILE
AC_FUNC_ALLOCA
+# Enable quiet compiles on automake 1.11.
+m4_ifdef([AM_SILENT_RULES], [AM_SILENT_RULES([yes])])
+
PKG_CHECK_MODULES(PTHREADSTUBS, pthread-stubs)
AC_SUBST(PTHREADSTUBS_CFLAGS)
AC_SUBST(PTHREADSTUBS_LIBS)
commit 58e54f62c91aff4f4be96c6d8771ca9110969f49
Author: Eric Anholt <eric@anholt.net>
Date: Tue May 25 20:11:23 2010 -0700
intel_bufmgr_fake: fix compile warning.
diff --git a/intel/intel_bufmgr_fake.c b/intel/intel_bufmgr_fake.c
index 9914952..bc4a2ff 100644
--- a/intel/intel_bufmgr_fake.c
+++ b/intel/intel_bufmgr_fake.c
@@ -299,10 +299,10 @@ _fence_wait_internal(drm_intel_bufmgr_fake *bufmgr_fake, int seq)
return;
}
- DBG("wait 0x%08x\n", iw.irq_seq);
-
iw.irq_seq = seq;
+ DBG("wait 0x%08x\n", iw.irq_seq);
+
/* The kernel IRQ_WAIT implementation is all sorts of broken.
* 1) It returns 1 to 0x7fffffff instead of using the full 32-bit
* unsigned range.
commit fcf3e616eeeb289f96af1436d809f0a1a42bebb7
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date: Mon May 24 18:35:41 2010 +0100
intel: Don't change tiling mode unless the kernel reports success.
Fixes:
Bug 26686 - Some textures are distorted with libdrm 2.4.18 in GTAVC>A3
http://bugs.freedesktop.org/show_bug.cgi?id=26686
This bug continues to haunt me. The kernel SET_TILING ioctl is
inconsistent in its return values when reporting an error. If one of its
sanity checks fail, then the input values are left unchanged. If the
kernel later fails to change the tiling mode, then the input values are
modified to match the current tiling on the object. In short, userspace
cannot trust the return values upon error and so we must assume that
upon error our current tiling mode matches reality and not update.
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index 54c82d6..b76fd7e 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -1662,13 +1662,15 @@ drm_intel_gem_bo_set_tiling(drm_intel_bo *bo, uint32_t * tiling_mode,
DRM_IOCTL_I915_GEM_SET_TILING,
&set_tiling);
} while (ret == -1 && errno == EINTR);
- bo_gem->tiling_mode = set_tiling.tiling_mode;
- bo_gem->swizzle_mode = set_tiling.swizzle_mode;
-
- drm_intel_bo_gem_set_in_aperture_size(bufmgr_gem, bo_gem);
+ if (ret == 0) {
+ bo_gem->tiling_mode = set_tiling.tiling_mode;
+ bo_gem->swizzle_mode = set_tiling.swizzle_mode;
+ drm_intel_bo_gem_set_in_aperture_size(bufmgr_gem, bo_gem);
+ } else
+ ret = -errno;
*tiling_mode = bo_gem->tiling_mode;
- return ret == 0 ? 0 : -errno;
+ return ret;
}
static int
commit a3305b076c005e0d3bd55da0214e91413cf65b48
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date: Thu May 13 08:24:28 2010 +0100
Revert "intel: We don't need to take the bufmgr lock whilst mapping."
This reverts commit 7ca558494dd3f68f29bb6ca981de9b8f49620b60.
This was pushed ahead of an essential review of bo level locking in
mesa, without which we cannot know whether removing this lock is safe.
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index 9daa89a..54c82d6 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -927,6 +927,8 @@ static int drm_intel_gem_bo_map(drm_intel_bo *bo, int write_enable)
struct drm_i915_gem_set_domain set_domain;
int ret;
+ pthread_mutex_lock(&bufmgr_gem->lock);
+
/* Allow recursive mapping. Mesa may recursively map buffers with
* nested display loops.
*/
@@ -950,6 +952,7 @@ static int drm_intel_gem_bo_map(drm_intel_bo *bo, int write_enable)
"%s:%d: Error mapping buffer %d (%s): %s .\n",
__FILE__, __LINE__, bo_gem->gem_handle,
bo_gem->name, strerror(errno));
+ pthread_mutex_unlock(&bufmgr_gem->lock);
return ret;
}
bo_gem->mem_virtual = (void *)(uintptr_t) mmap_arg.addr_ptr;
@@ -974,9 +977,12 @@ static int drm_intel_gem_bo_map(drm_intel_bo *bo, int write_enable)
fprintf(stderr, "%s:%d: Error setting to CPU domain %d: %s\n",
__FILE__, __LINE__, bo_gem->gem_handle,
strerror(errno));
+ pthread_mutex_unlock(&bufmgr_gem->lock);
return ret;
}
+ pthread_mutex_unlock(&bufmgr_gem->lock);
+
return 0;
}
@@ -987,6 +993,8 @@ int drm_intel_gem_bo_map_gtt(drm_intel_bo *bo)
struct drm_i915_gem_set_domain set_domain;
int ret;
+ pthread_mutex_lock(&bufmgr_gem->lock);
+
/* Get a mapping of the buffer if we haven't before. */
if (bo_gem->gtt_virtual == NULL) {
struct drm_i915_gem_mmap_gtt mmap_arg;
@@ -1010,6 +1018,7 @@ int drm_intel_gem_bo_map_gtt(drm_intel_bo *bo)
__FILE__, __LINE__,
bo_gem->gem_handle, bo_gem->name,
strerror(errno));
+ pthread_mutex_unlock(&bufmgr_gem->lock);
return ret;
}
@@ -1025,6 +1034,7 @@ int drm_intel_gem_bo_map_gtt(drm_intel_bo *bo)
__FILE__, __LINE__,
bo_gem->gem_handle, bo_gem->name,
strerror(errno));
+ pthread_mutex_unlock(&bufmgr_gem->lock);
return ret;
}
}
@@ -1051,6 +1061,8 @@ int drm_intel_gem_bo_map_gtt(drm_intel_bo *bo)
strerror(errno));
}
+ pthread_mutex_unlock(&bufmgr_gem->lock);
+
return ret;
}
@@ -1065,7 +1077,9 @@ int drm_intel_gem_bo_unmap_gtt(drm_intel_bo *bo)
assert(bo_gem->gtt_virtual != NULL);
+ pthread_mutex_lock(&bufmgr_gem->lock);
bo->virtual = NULL;
+ pthread_mutex_unlock(&bufmgr_gem->lock);
return ret;
}
@@ -1082,6 +1096,8 @@ static int drm_intel_gem_bo_unmap(drm_intel_bo *bo)
assert(bo_gem->mem_virtual != NULL);
+ pthread_mutex_lock(&bufmgr_gem->lock);
+
/* Cause a flush to happen if the buffer's pinned for scanout, so the
* results show up in a timely manner.
*/
@@ -1094,6 +1110,7 @@ static int drm_intel_gem_bo_unmap(drm_intel_bo *bo)
ret = ret == -1 ? -errno : 0;
bo->virtual = NULL;
+ pthread_mutex_unlock(&bufmgr_gem->lock);
return ret;
}
commit 52a3e9df629952e58bd019b8cd4cda1dd254a543
Author: Jonathan Callen <abcd@gentoo.org>
Date: Wed May 12 13:55:34 2010 -0400
Only build tests in make check
Currently, all the tests for libdrm are built during 'make all', even
if you do not wish to run tests. Attached is a patch, based on
version 2.4.15, to make the tests build in 'make check'.
diff --git a/tests/Makefile.am b/tests/Makefile.am
index 5d240a0..ebf4853 100644
--- a/tests/Makefile.am
+++ b/tests/Makefile.am
@@ -6,7 +6,7 @@ AM_CPPFLAGS = \
LDADD = $(top_builddir)/libdrm.la
-noinst_PROGRAMS = \
+check_PROGRAMS = \
dristat \
drmstat
@@ -21,7 +21,7 @@ endif
if HAVE_LIBUDEV
-EXTRA_LTLIBRARIES = libdrmtest.la
+check_LTLIBRARIES = libdrmtest.la
libdrmtest_la_SOURCES = \
drmtest.c \
@@ -63,8 +63,6 @@ TESTS += \
$(NULL)
endif
-EXTRA_PROGRAMS = $(TESTS)
+check_PROGRAMS += $(TESTS)
endif
-
-CLEANFILES = $(EXTRA_PROGRAMS) $(EXTRA_LTLIBRARIES)
commit 62731b84114e5dd3310b465921955db14278c256
Author: Kristian Høgsberg <krh@bitplanet.net>
Date: Wed May 12 13:34:25 2010 -0400
Pull in new kernel headers
Changes struct drm_mode_crtc_page_flip to use __u32 instead of uint32_t,
fixes
https://bugs.freedesktop.org/show_bug.cgi?id=26994
diff --git a/include/drm/drm.h b/include/drm/drm.h
index 4822159..a0559eb 100644
--- a/include/drm/drm.h
+++ b/include/drm/drm.h
@@ -699,8 +699,6 @@ struct drm_gem_open {
#define DRM_IOCTL_MODE_PAGE_FLIP DRM_IOWR(0xB0, struct drm_mode_crtc_page_flip)
#define DRM_IOCTL_MODE_DIRTYFB DRM_IOWR(0xB1, struct drm_mode_fb_dirty_cmd)
-/*@}*/
-
/**
* Device specific ioctls should only be in their respective headers
* The device specific ioctl range is from 0x40 to 0x99.
diff --git a/include/drm/drm_mode.h b/include/drm/drm_mode.h
index dfc390e..43009bc 100644
--- a/include/drm/drm_mode.h
+++ b/include/drm/drm_mode.h
@@ -75,6 +75,11 @@
#define DRM_MODE_DITHERING_OFF 0
#define DRM_MODE_DITHERING_ON 1
+/* Dirty info options */
+#define DRM_MODE_DIRTY_OFF 0
+#define DRM_MODE_DIRTY_ON 1
+#define DRM_MODE_DIRTY_ANNOTATE 2
+
struct drm_mode_modeinfo {
__u32 clock;
__u16 hdisplay, hsync_start, hsync_end, htotal, hskew;
@@ -307,12 +312,34 @@ struct drm_mode_crtc_lut {
#define DRM_MODE_PAGE_FLIP_EVENT 0x01
#define DRM_MODE_PAGE_FLIP_FLAGS DRM_MODE_PAGE_FLIP_EVENT
+/*
+ * Request a page flip on the specified crtc.
+ *
+ * This ioctl will ask KMS to schedule a page flip for the specified
+ * crtc. Once any pending rendering targeting the specified fb (as of
+ * ioctl time) has completed, the crtc will be reprogrammed to display
+ * that fb after the next vertical refresh. The ioctl returns
+ * immediately, but subsequent rendering to the current fb will block
+ * in the execbuffer ioctl until the page flip happens. If a page
+ * flip is already pending as the ioctl is called, EBUSY will be
+ * returned.
+ *
+ * The ioctl supports one flag, DRM_MODE_PAGE_FLIP_EVENT, which will
+ * request that drm sends back a vblank event (see drm.h: struct
+ * drm_event_vblank) when the page flip is done. The user_data field
+ * passed in with this ioctl will be returned as the user_data field
+ * in the vblank event struct.
+ *
+ * The reserved field must be zero until we figure out something
+ * clever to use it for.
+ */
+
struct drm_mode_crtc_page_flip {
- uint32_t crtc_id;
- uint32_t fb_id;
- uint32_t flags;
- uint32_t reserved;
- uint64_t user_data;
+ __u32 crtc_id;
+ __u32 fb_id;
+ __u32 flags;
+ __u32 reserved;
+ __u64 user_data;
};
#endif
commit 07e7589d86624e9c1ca4c38d00cf6886e1445ae2
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date: Tue May 11 08:54:06 2010 +0100
intel: query whether a buffer is reusable.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
diff --git a/intel/intel_bufmgr.c b/intel/intel_bufmgr.c
index ce21a33..9144fdd 100644
--- a/intel/intel_bufmgr.c
+++ b/intel/intel_bufmgr.c
@@ -229,6 +229,13 @@ int drm_intel_bo_disable_reuse(drm_intel_bo *bo)
return 0;
}
+int drm_intel_bo_is_reusable(drm_intel_bo *bo)
+{
+ if (bo->bufmgr->bo_is_reusable)
+ return bo->bufmgr->bo_is_reusable(bo);
+ return 0;
+}
+
int drm_intel_bo_busy(drm_intel_bo *bo)
{
if (bo->bufmgr->bo_busy)
diff --git a/intel/intel_bufmgr.h b/intel/intel_bufmgr.h
index 0984ab0..cbcddb6 100644
--- a/intel/intel_bufmgr.h
+++ b/intel/intel_bufmgr.h
@@ -126,6 +126,7 @@ int drm_intel_bo_busy(drm_intel_bo *bo);
int drm_intel_bo_madvise(drm_intel_bo *bo, int madv);
int drm_intel_bo_disable_reuse(drm_intel_bo *bo);
+int drm_intel_bo_is_reusable(drm_intel_bo *bo);
int drm_intel_bo_references(drm_intel_bo *bo, drm_intel_bo *target_bo);
/* drm_intel_bufmgr_gem.c */
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index 8fa5631..9daa89a 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -1904,6 +1904,14 @@ drm_intel_gem_bo_disable_reuse(drm_intel_bo *bo)
}
static int
+drm_intel_gem_bo_is_reusable(drm_intel_bo *bo)
+{
+ drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
+
+ return bo_gem->reusable;
+}
+
+static int
_drm_intel_gem_bo_references(drm_intel_bo *bo, drm_intel_bo *target_bo)
{
drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo;
@@ -2060,6 +2068,7 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size)
bufmgr_gem->bufmgr.check_aperture_space =
drm_intel_gem_check_aperture_space;
bufmgr_gem->bufmgr.bo_disable_reuse = drm_intel_gem_bo_disable_reuse;
+ bufmgr_gem->bufmgr.bo_is_reusable = drm_intel_gem_bo_is_reusable;
bufmgr_gem->bufmgr.get_pipe_from_crtc_id =
drm_intel_gem_get_pipe_from_crtc_id;
bufmgr_gem->bufmgr.bo_references = drm_intel_gem_bo_references;
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