Bug#535288: libaio: Please add support Renesas SuperH
Package: libaio
Severity: wishlist
Tags: patch
X-Debbugs-CC: debian-superh@lists.debian.org
Hi,
I am now trying to run Debian on Renesas SH CPU.
Currnet this package doesn't support Renesas SH.
I made a patch to support SH.
Would you please apply it?
Best regards,
Nobuhiro
-- System Information:
Debian Release: squeeze/sid
APT prefers unstable
APT policy: (500, 'unstable')
Architecture: i386 (i686)
Kernel: Linux 2.6.29-2-686 (SMP w/2 CPU cores)
Locale: LANG=ja_JP.UTF-8, LC_CTYPE=ja_JP.UTF-8 (charmap=UTF-8)
Shell: /bin/sh linked to /bin/bash
--
Nobuhiro Iwamatsu
GPG ID: 3170EBE9
diff --git a/harness/main.c b/harness/main.c
index f472da7..01fbb87 100644
--- a/harness/main.c
+++ b/harness/main.c
@@ -13,7 +13,7 @@
#if defined(__i386__) || defined(__powerpc__) || defined(__mips__)
#define KERNEL_RW_POINTER ((void *)0xc0010000)
-#elif defined(__arm__) || defined(__m68k__) || defined(__s390__)
+#elif defined(__arm__) || defined(__m68k__) || defined(__s390__) || defined(__sh__)
#define KERNEL_RW_POINTER ((void *)0x00010000)
#elif defined(__hppa__)
#define KERNEL_RW_POINTER ((void *)0x10100000)
diff --git a/src/libaio.h b/src/libaio.h
index 68e22ac..d306084 100644
--- a/src/libaio.h
+++ b/src/libaio.h
@@ -107,6 +107,16 @@ typedef enum io_iocb_cmd {
# else
# error "neither mipseb nor mipsel?"
# endif
+#elif defined(__sh__) /* sh3/sh4*/
+# if defined (__BIG_ENDIAN__) /* big endian, 32 bits */
+#define PADDED(x, y) unsigned y; x
+#define PADDEDptr(x, y) unsigned y; x
+#define PADDEDul(x, y) unsigned y; unsigned long x
+# elif defined(__LITTLE_ENDIAN__) /* little endian, 32 bits */
+#define PADDED(x, y) x; unsigned y
+#define PADDEDptr(x, y) x; unsigned y
+#define PADDEDul(x, y) unsigned long x; unsigned y
+# endif
#else
#error endian?
#endif
diff --git a/src/syscall-sh.h b/src/syscall-sh.h
new file mode 100644
index 0000000..9945ec6
--- /dev/null
+++ b/src/syscall-sh.h
@@ -0,0 +1,78 @@
+/* Copy from ./arch/sh/include/asm/unistd_32.h */
+#define __NR_io_setup 245
+#define __NR_io_destroy 246
+#define __NR_io_getevents 247
+#define __NR_io_submit 248
+#define __NR_io_cancel 249
+
+#define io_syscall1(type,fname,sname,type1,arg1) \
+type fname(type1 arg1) \
+{ \
+register long __sc0 __asm__ ("r3") = __NR_##sname; \
+register long __sc4 __asm__ ("r4") = (long) arg1; \
+__asm__ __volatile__ ("trapa #0x11" \
+ : "=z" (__sc0) \
+ : "0" (__sc0), "r" (__sc4) \
+ : "memory"); \
+ return (type) __sc0;\
+}
+
+#define io_syscall2(type,fname,sname,type1,arg1,type2,arg2) \
+type fname(type1 arg1,type2 arg2) \
+{ \
+register long __sc0 __asm__ ("r3") = __NR_##sname; \
+register long __sc4 __asm__ ("r4") = (long) arg1; \
+register long __sc5 __asm__ ("r5") = (long) arg2; \
+ __asm__ __volatile__ ("trapa #0x12" \
+ : "=z" (__sc0) \
+ : "0" (__sc0), "r" (__sc4), "r" (__sc5) \
+ : "memory"); \
+ return (type) __sc0;\
+}
+
+#define io_syscall3(type,fname,sname,type1,arg1,type2,arg2,type3,arg3) \
+type fname(type1 arg1,type2 arg2,type3 arg3) \
+{ \
+register long __sc0 __asm__ ("r3") = __NR_##sname; \
+register long __sc4 __asm__ ("r4") = (long) arg1; \
+register long __sc5 __asm__ ("r5") = (long) arg2; \
+register long __sc6 __asm__ ("r6") = (long) arg3; \
+ __asm__ __volatile__ ("trapa #0x13" \
+ : "=z" (__sc0) \
+ : "0" (__sc0), "r" (__sc4), "r" (__sc5), "r" (__sc6) \
+ : "memory"); \
+ return (type) __sc0;\
+}
+
+#define io_syscall4(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \
+type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4) \
+{ \
+register long __sc0 __asm__ ("r3") = __NR_##sname; \
+register long __sc4 __asm__ ("r4") = (long) arg1; \
+register long __sc5 __asm__ ("r5") = (long) arg2; \
+register long __sc6 __asm__ ("r6") = (long) arg3; \
+register long __sc7 __asm__ ("r7") = (long) arg4; \
+__asm__ __volatile__ ("trapa #0x14" \
+ : "=z" (__sc0) \
+ : "0" (__sc0), "r" (__sc4), "r" (__sc5), "r" (__sc6), \
+ "r" (__sc7) \
+ : "memory" ); \
+ return (type) __sc0;\
+}
+
+#define io_syscall5(type,fname,sname,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \
+type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) \
+{ \
+register long __sc3 __asm__ ("r3") = __NR_##sname; \
+register long __sc4 __asm__ ("r4") = (long) arg1; \
+register long __sc5 __asm__ ("r5") = (long) arg2; \
+register long __sc6 __asm__ ("r6") = (long) arg3; \
+register long __sc7 __asm__ ("r7") = (long) arg4; \
+register long __sc0 __asm__ ("r0") = (long) arg5; \
+__asm__ __volatile__ ("trapa #0x15" \
+ : "=z" (__sc0) \
+ : "0" (__sc0), "r" (__sc4), "r" (__sc5), "r" (__sc6), "r" (__sc7), \
+ "r" (__sc3) \
+ : "memory" ); \
+ return (type) __sc0;\
+}
diff --git a/src/syscall.h b/src/syscall.h
index b957bbe..ea0435e 100644
--- a/src/syscall.h
+++ b/src/syscall.h
@@ -32,6 +32,8 @@
#include "syscall-parisc.h"
#elif defined(__mips__)
#include "syscall-mips.h"
+#elif defined(__sh__)
+#include "syscall-sh.h"
#else
#error "add syscall-arch.h"
#endif
--
1.6.3.1
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