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Bug#758115: Disabled wait state X'32EE' on IPL of zIPL



On Fri, 15 Aug 2014 17:24:30 -0400 (EDT), Philipp Kern wrote:
> 
> ...
> Do you happen to have the PSW handy?

The full PSW is as follows:

   00020000 80000000 00000000000032EE

It looks like the "wait" bit is set, "31-bit addressing mode" is set,
I/O, External, and Machine check interruptions are all disabled,
and the instruction address (i.e. disabled wait state code) is set
to X'32EE'.

-- 
  .''`.     Stephen Powell    
 : :'  :
 `. `'`
   `-


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