-
0fff844c
by Michel Zou
at 2021-05-10T21:43:56+02:00
gallium: fix uninitialized variable warning
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 54deb1010f7db2a1d73557194557ab0ac851b30f)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10379>
-
7257be4d
by Michel Zou
at 2021-05-10T21:44:58+02:00
lavapipe: fix unused variable warning
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 45f32ce239bcc756c9720896d12bc02d9e6cdc50)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10379>
-
62e4fe23
by Michel Zou
at 2021-05-10T21:44:58+02:00
vulkan: fix duplicate win32 def
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit dc036b17695318cd9c7f8e3376c017e896c2d1b1)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10379>
-
c51a8d12
by Michel Zou
at 2021-05-10T21:44:58+02:00
meson: link vulkan_util with link_whole on mingw
It was missing for mingw.
Closes #4633
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: James Park <jpark37@lagfreegames.com>
(cherry picked from commit 48d31a6280c4de07279435606a5c0524c1787cad)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10379>
-
f08e0a20
by Dylan Baker
at 2021-05-10T21:44:59+02:00
meson/vulkan: fix linkage on windows
The current approach likley breaks icl and clang-cl, but it seems that
the problem isn't even really related to MSVC, but to Meson's Visual
Studio backend, as such, let's use link-whole unless we're using a
Visual Studio backend.
Fixes: 48d31a6280c4de07279435606a5c0524c1787cad
("meson: link vulkan_util with link_whole on mingw")
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: James Park <jpark37@lagfreegames.com>
(cherry picked from commit f03da01fe374b87b5144c77f56ab78cf7c2a2ed3)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10379>
-
1947597f
by Eric Engestrom
at 2021-05-10T21:44:59+02:00
.pick_status.json: Update to a1c56b80915a1105c5a62aa6ff3ac71c1edd143d
-
2ceb11aa
by Connor Abbott
at 2021-05-10T23:01:24+02:00
freedreno/a6xx: Fix SP_GS_PRIM_SIZE for large sizes
This fixes a few piglit hangs.
Fixes: 0eebedb ("freedreno/a6xx: Emit program state for GS")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10551>
(cherry picked from commit e7b7908f87a437b3d4a239bf9f2119154967757e)
-
bb746def
by Caio Marcelo de Oliveira Filho
at 2021-05-12T21:37:10+02:00
nir: Move shared_memory_explicit_layout bit into common shader_info
Move it out of the "cs" sub-struct, since the bit can be used for
other shader stages in the future.
This also removes a subtle issue in spirv_to_nir:
info.cs.shared_memory_explicit_layout was used without checking for
the CS shader stage. It ended up being "harmless" since the effects
also depended on presence of shared variables.
Fixes: 5de6c5973a6 ("spirv: Implement SPV_KHR_workgroup_memory_explicit_layout")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10529>
(cherry picked from commit dd48683cfd6daf07602b7e92b96baf3704489fd7)
-
db3c2cdf
by Marek Olšák
at 2021-05-12T21:37:10+02:00
Revert "gallium/u_threaded: align batches and call slots to 16 bytes"
This reverts commit 3b1ce49bc1e5aff87805b0bab255885c84bf5052.
It will be completely rewritten, but let's revert this first.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.eric.pelloux-prayer@amd.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10606>
(cherry picked from commit 954f59f2af4a135f2af2d2b6e341b4332ad3cccd)
-
ceafcf3d
by Erik Faye-Lund
at 2021-05-12T21:37:10+02:00
docs: do not generate redirects on error
The build-finished event is also triggered when there's an error. I
somehow got the second argument wrong, and ended up ignoring the case.
This can lead to new exceptions being thrown due to missing files, that
ends up hiding the real problem.
Fixes: 64a4ba9e1ce ("docs: add an extension to generate redirects")
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10407>
(cherry picked from commit 2736370294427d87933ce7ae293e0465fbab77e2)
-
fb696bbb
by Danylo Piliaiev
at 2021-05-12T21:37:11+02:00
ir3: memory_barrier also controls shared memory access order
nir_intrinsic_memory_barrier has the same semantic as memoryBarrier()
in GLSL, which is:
GLSL 4.60, 4.10. "Memory Qualifiers":
"The built-in function memoryBarrier() can be used if needed to
guarantee the completion and relative ordering of memory accesses
performed by a single shader invocation."
GLSL 4.60, 8.17. "Shader Memory Control Functions":
"The built-in functions memoryBarrier() and groupMemoryBarrier() wait
for the completion of accesses to all of the above variable types."
Fixes tests:
dEQP-VK.memory_model.message_passing.core11.u32.coherent.fence_fence.atomicwrite.device.payload_local.image.guard_nonlocal.workgroup.comp
dEQP-VK.memory_model.message_passing.core11.u32.coherent.fence_fence.atomicwrite.device.payload_nonlocal.workgroup.guard_local.image.comp
Fixes: 819a613a ("freedreno/ir3: moar better scheduler")
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9054>
(cherry picked from commit cb8a00791cc9618f5be903c31abf737b42e4cf46)
-
da315007
by Erik Faye-Lund
at 2021-05-12T21:37:11+02:00
gallium/u_vbuf: avoid dereferencing NULL pointer
When I last time fixed this, I missed that continuing here would make us
leak pointers in the translate state, which is what made this avoid a
crash in the first place.
That's not great, we need to set *some* pointer in this case. The
obvious option would be NULL, but that means that the translate-code
also needs to support NULL-pointers here.
Instead, let's point to a small, static buffer that contains enough
zero-data for the largest possible vertex attribute. This avoids having
to add more NULL-checks.
Fixes: a8e8204b186 ("gallium/u_vbuf: support NULL-resources")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7773>
(cherry picked from commit a2d091694f8cf30f7f8a15d9c26712d4e56eaa6c)
-
b125ee55
by Jordan Justen
at 2021-05-12T21:37:11+02:00
bin/pick: Rename master branch to main
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
(cherry picked from commit 6e86d1f503d8b017bd6679a4db70fef532595f65)
[Eric: botched up Jordan's commit to not break anything on the release branch]
-
7ccaf809
by Eric Engestrom
at 2021-05-12T21:37:11+02:00
.pick_status.json: Update to 584145ea882b710027ce620a5d505bd25ab284b1
-
7c3ec53a
by Samuel Pitoiset
at 2021-05-12T21:37:11+02:00
radv: fix missing ITERATE_256 for D/S MSAA images that are TC-compat HTILE
To make them readable by shaders, only needed on GFX10+.
This also fixes corruption with Control and MSAA.
Cc: 21.1 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10610>
(cherry picked from commit 33ede796d5b9149076738b031137b4389dab71a1)
-
4da22b39
by Eric Engestrom
at 2021-05-18T23:02:25+02:00
.pick_status.json: Mark 6cac9c748eb81105b5cd7df32060ee8aae2b1e5f as denominated
-
92bb5b14
by Dave Airlie
at 2021-05-18T23:02:25+02:00
gallivm: handle texture arrays in non-fragment shaders with lod.
We have to unwind the lod into the scalar path correctly.
Fixes a crash with renderdoc demo
Fixes: e168d148d76d ("gallivm/nir: handle non-uniform texture offsets")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10676>
(cherry picked from commit 83a05caaf2ce4fa9d6605eddd5658bf400f642fb)
-
b9583231
by Samuel Pitoiset
at 2021-05-18T23:02:25+02:00
radv: fix extending the dirty bits to 64-bit
New dynamic states added for VK_EXT_extended_dynamic_state2 causes
GPU hangs with vkd3d-proton.
Fixes: 7bdd569d7e1 ("radv: extend the dirty bits to 64-bit")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10693>
(cherry picked from commit 54b0cfb061ec393abdd9cf5bc7f43cb898c8fd4d)
-
766f1663
by Mauro Rossi
at 2021-05-18T23:02:25+02:00
android: nir: add nir_lower_fragcolor.c to Makefile.sources
Fixes the following building error:
FAILED: out/target/product/x86_64/obj/SHARED_LIBRARIES/gallium_dri_intermediates/LINKED/gallium_dri.so
...
ld.lld: error: undefined symbol: nir_lower_fragcolor
>>> referenced by pan_assemble.c:81 (external/mesa/src/gallium/drivers/panfrost/pan_assemble.c:81)
Cc: 21.0 21.1 <mesa-stable@lists.freedesktop.org>
Fixes: 1fd356302590 ("nir: add lowering pass for fragcolor -> fragdata")
Acked-by: Rob Clark <robclark@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10712>
(cherry picked from commit 2736ae0454d574a1909863d7870fa4f1fe91bd7d)
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d7d4250a
by Karol Herbst
at 2021-05-18T23:02:25+02:00
clover/memory: fix data race in buffer subclasses
Cc: mesa-stable
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8765>
(cherry picked from commit 98280e834873a0f8711aa489a2a4e256a25566d0)
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0c3328ef
by Eric Engestrom
at 2021-05-18T23:02:25+02:00
egl/x11: don't forget to exit the attrib list loop
Without this check, if we receive any attribs from the client, we either
find an X11/XCB screen fd in there, or we keep going until we end up in
random bits of memory and crash.
Fixes: 4aebd86f9a1b0db0ebcc ("egl/x11: pick the user requested screen")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10717>
(cherry picked from commit 2af08bf7b69a5f3b8f94b8669f1bff67405ca396)
-
2ef356c0
by Juan A. Suarez Romero
at 2021-05-18T23:02:25+02:00
v3d: fix resource leak in error path
Do not leak pipe resource if scanout resource creation fails.
Fixes: bf6973199d1 ("v3d: Allow the UIF modifier with renderonly.")
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10643>
(cherry picked from commit 66bf683ca9b5889aa05c32d3e35ea2649bab7d23)
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eaecde60
by Mike Blumenkrantz
at 2021-05-18T23:02:25+02:00
iris: refcount separate screen objects for resource tracking
this screen object can never, ever be accessed like this in a resource,
as it may have previously been replaced by a wrapper (e.g., driver trace)
which will then explode when it is accessed directly
instead, keep a separate screen ref on the resource which is known to be
the actual driver object and not a wrapper
Fixes: 0a497eb1303 ("iris: make resources take a ref on the screen object")
Reviewed-by: Lionel Landwerlin lionel.g.landwerlin@intel.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10632>
(cherry picked from commit eb63c7decedb6188122f01d9851c44aa8d1d0e33)
-
0a69eb9b
by Eric Engestrom
at 2021-05-18T23:02:25+02:00
.pick_status.json: Update to e8640fef9089bb31a9e602a8894ae4fe84086118
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29ac834b
by Marcin Ślusarz
at 2021-05-18T23:02:25+02:00
nir: handle float atomics in nir_lower_memory_model
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 2adb337256f ("nir,radv/aco: add and use pass to lower make available/visible barriers")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10766>
(cherry picked from commit 2c3e2d69bd1e1ab715783f0ef41daf99519ed12e)
-
3c3bf6e7
by Daniel Schürmann
at 2021-05-18T23:02:26+02:00
aco: fix additional register requirements for spilling
It could happen that VGPR spilling without SGPR spilling
calculated a negative spills_to_vgpr number and then
increasing the VGPR target demand above the limit.
Cc: mesa-stable
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10756>
(cherry picked from commit 989e9867a64045421cf77c0d0bb2d184408ed21f)
-
6f64bbd5
by Eric Engestrom
at 2021-05-18T23:02:26+02:00
.pick_status.json: Update to 0c30ad402d0011c957576681d2aaf9b2e68c318e
-
4e8adee4
by Timothy Arceri
at 2021-05-18T23:02:26+02:00
glsl: add missing support for explicit components in interface blocks
>From the ARB_enhanced_layouts spec:
"As with input layout qualifiers, all shaders except compute shaders
allow *location* layout qualifiers on output variable declarations,
output block declarations, and output block member declarations. Of
these, variables and block members (but not blocks) additionally
allow the *component* layout qualifier."
We previously had compile tests in piglit to make sure this was not a
compile error but no execution tests.
Fixes: d99a040bbf2c ("i965: enable ARB_enhanced_layouts for gen8+")
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10763>
(cherry picked from commit 5aabc912739a99ddaee482e54b9ca3fc76a092f1)
-
91f972af
by Tapani Pälli
at 2021-05-18T23:02:26+02:00
isl: require hiz for depth surface in isl_surf_get_ccs_surf
Fixes: 752eefdb ("intel/isl: Refactor isl_surf_get_ccs_surf")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10768>
(cherry picked from commit 343d90b6ab536ce92050035682c072ad1c21b694)
-
0d33ae94
by Tony Wasserka
at 2021-05-18T23:02:26+02:00
aco/scheduler: Fix register demand computation for downwards moves
Previously, changes in total_demand_clause were not always propagated to
total_demand. For instance, clause moves do not change the local register
demand at the end of a clause, yet they may still affect the total maximum.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 8235bc64112 ("aco: try to group together VMEM loads of the same resource")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4533
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10644>
(cherry picked from commit c528af10761aa3ea902df269d71b54425c54e877)
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b4d951c1
by Tony Wasserka
at 2021-05-18T23:02:26+02:00
aco/scheduler: Fix register demand computation for upwards moves
The initial value needs to be taken from the instruction that is being
moved over, not the one to be moved.
Additionally the parameter of this function was removed because it was
misleading. Setting it to any value other than source_idx would cause
register_demand to be initialized incorrectly. (Instead, the maximum
demand among the covered instructions would need to be determined.)
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10644>
(cherry picked from commit 50ba919d37289d1ed9bf2464042eaa0b8e3dbb2e)
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21cea3e2
by Abel García Dorta
at 2021-05-18T23:02:26+02:00
i915g: add HW atomic counters as unsupported
Closes: #4772
Fixes: 2a06423c009 ("gallium: add CAPs to support HW atomic counters. (v3)")
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10776>
(cherry picked from commit f88dd7ed4d2d2cac9816bc386064d08e5c4c06e7)
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b7bf755c
by Lionel Landwerlin
at 2021-05-18T23:02:26+02:00
intel/mi_builder: fix resolve call
Giving NULL for anv_combine_address() triggers an assert in that
function.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 8525ebe6e375 ("intel/mi_builder: Return an address from __gen_get_batch_address")
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10301>
(cherry picked from commit 2c2de4d60efc8bd315374b003d2b7e2c63737002)
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53d0c0d7
by Lionel Landwerlin
at 2021-05-18T23:02:26+02:00
anv: fix perf query pass with command buffer batching
We've only considered the perf query pool change previously. But we
also need to pay attention to the pass index.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 0a7224f3ff7542 ("anv: group as many command buffers into a single execbuf")
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10301>
(cherry picked from commit 2cebb1b5b3eb9b2e774aa90f9cbd67106ff8f77c)
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abd4ab6f
by Mike Blumenkrantz
at 2021-05-18T23:02:26+02:00
zink: stop overwriting buffer map pointers for stream uploader
this breaks the driver!
the uploader always maps its own pointer, so modifying that at any
point just explodes things later
Fixes: d179c5d28e6 ("zink: implement threaded context")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10787>
(cherry picked from commit 8e2ac24482d87b10e2619c2de67ae0bfb33e98c4)
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bb8b8b8f
by Mike Blumenkrantz
at 2021-05-18T23:02:26+02:00
lavapipe: fix fencing when submitting multiple cmdbufs
a fence applies to all the submitted cmdbufs, so it's necessary to do
the flush which creates the user fence after all the cmdbufs have been
processed in order to avoid creating a fence that only applies to the
first cmdbuf
Fixes: b38879f8c5f ("vallium: initial import of the vulkan frontend")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10795>
(cherry picked from commit cf3f17a64345d59c7f044e9ccd04631b930003d3)
-
a4189ac6
by Jordan Justen
at 2021-05-18T23:02:26+02:00
intel/isl: Add Wa_22011186057 to disable CCS on ADL GT2 A0
Cc: mesa-stable
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9465>
(cherry picked from commit 89f33126252e16dac61d4045f38a6eee76db944f)
-
14776278
by Jordan Justen
at 2021-05-18T23:02:26+02:00
intel/dev: Add device info for ADL GT2
Cc: mesa-stable
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9465>
(cherry picked from commit e435511b580287d1fab1b1028b2d36acce80dac9)
-
64a20159
by Lionel Landwerlin
at 2021-05-18T23:02:26+02:00
anv: handle spirv parsing failure
v2: don't leak spec_entries
v3: Also switch to VK_ERROR_UNKNOWN when parsing fails
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10790>
(cherry picked from commit 938e52a6e83f2851c7cacbf97c5dfd4e1ff6837d)
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339d7339
by Daniel Schürmann
at 2021-05-18T23:02:26+02:00
driconf: set vk_x11_strict_image_count for Metro: Exodus
Otherwise, the game crashes on startup under xwayland.
Closes: #4650
Cc: mesa-stable
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10750>
(cherry picked from commit c62d58c80f1751766a5702f8cb65dc806ce8fe89)
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6fdd4189
by Jordan Justen
at 2021-05-18T23:02:26+02:00
intel: Add 2 ADL-S pci-ids
Cc: mesa-stable
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10781>
(cherry picked from commit df5b14969f9869f363bcc8b2a564c85aaa481597)
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df7c4454
by Gert Wollny
at 2021-05-18T23:02:26+02:00
compiler/nir: check whether var is an input in lower_fragcoord_wtrans
Otherwise the lowering pass might try to lower any other load from
a deref if its data.location value happens to be zero.
Fixes: 418c4c0d7d48a42f475df1ffb93b3a33763e7a4a
compiler/nir: extend lower_fragcoord_wtrans to support VARYING_SLOT_POS
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10577>
(cherry picked from commit e418710f8bd2bc95a863d0a04154d7da37ead7ac)
-
fbc49e91
by Daniel Schürmann
at 2021-05-18T23:02:26+02:00
aco/ra: prevent underflow register for p_create_vector operands
It could happen that we tested negative out-of-range
registers for p_create_vector operands resulting in a crash.
Fixes: 8962510e38fbaff792f60bc17d46507bb77401ac ('aco/ra: Conservatively refactor get_reg_specified to use PhysRegInterval')
Closes: #4697
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10799>
(cherry picked from commit d659ce0d6c5781a1230b182ef5ed1a77de485565)
-
443854ec
by Daniel Schürmann
at 2021-05-18T23:02:27+02:00
radv: call nir_copy_prop() after load-store vectorization
The load-store vectorizer can create a large amount
of unnecessary nir_op_vec and nir_op_mov instructions.
This prevents nir_opt_move from stalling to much and
potentially also helps other passes.
Closes: #4778
Fixes: 1958381c9ae15dc252bcab8612f39fdca45d4843 ('radv: Reorder some NIR optimizations in preparation for the I/O changes.')
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10804>
(cherry picked from commit b3eb87aa6547ba2921c1bf2553c6558f99d459c7)
-
e266136b
by Nanley Chery
at 2021-05-18T23:02:27+02:00
anv: Add clear_supported to anv_layout_to_aux_state
This will be used for an MCS workaround.
Cc: mesa-stable
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8755>
(cherry picked from commit 608c1316389ac3a7a2e118983fb7e434470e4ada)
-
5df6ee66
by Nanley Chery
at 2021-05-18T23:02:27+02:00
anv: Avoid sampling some MCS surfaces with clear
Supposedly avoids GPU hangs in BF4. See HSD 1707282275 and 14013111325.
v2. Fix bug in WA implementation. (Sagar)
Cc: mesa-stable
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8755>
(cherry picked from commit eef4c708b3fd0af3c641b3d349588e2cfcfcb485)
-
85822fb7
by Nanley Chery
at 2021-05-18T23:02:27+02:00
iris: Avoid sampling some MCS surfaces with clear
Supposedly avoids GPU hangs in BF4. See HSD 1707282275 and 14013111325.
v2. Fix bug in WA implementation. (Sagar)
Cc: mesa-stable
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8755>
(cherry picked from commit bcdebf4ff8f6e1d18e3dd129039a7618907fe8af)
-
3514ef15
by Joshua Ashton
at 2021-05-18T23:02:27+02:00
radv: Handle unnormalized samplers in YCbCr lowering
We need to divide these by their divisors and special-case COSITED_EVEN.
Fixes NV12 compositing in Gamescope.
Fixes: 91702374 ("radv: Add ycbcr lowering pass.")
Cc: mesa-stable
Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10816>
(cherry picked from commit 855cb78d4631afeb51291cf1f2f936841d52e8d4)
-
3a0ba0f0
by Joshua Ashton
at 2021-05-18T23:02:27+02:00
venus: Fix zero-initialized fd causing apps to hang/crash
Some apps such as Gamescope crash under the mere presence of the virtio Vulkan driver without using a device.
This is because virtgpu::fd is zero-initialized upon allocation, which causes fd 0 to be closed in virtgpu_destroy.
Cc: mesa-stable
Fixes: 247232d5 ("venus: add experimental renderers")
Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10814>
(cherry picked from commit 6fcf3314d00529e2e09fdff1d31332f0d8c0c5cf)
-
8c9b65c8
by Eric Engestrom
at 2021-05-18T23:02:27+02:00
.pick_status.json: Update to 6d56c16c9ceb864af6bb71d0bdcdd21064d94307
-
791ef86d
by Timothy Arceri
at 2021-05-18T23:02:27+02:00
glsl: create validate_component_layout_for_type() helper
This will be used in the following patch.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10763>
(cherry picked from commit 1a71d6aa6e13179526b41e627f00af25b1612556)
-
ffdbd58d
by James Park
at 2021-05-18T23:02:27+02:00
vulkan: Support 32-bit "weak" symbols on MSVC
MSVC uses different decorated names for 32-bit versus 64-bit. Declare
all argument sizes for 32-bit because computing the actual size would be
difficult.
Fixes: 9be7aa3fc83 ("vulkan: Add a common entrypoint table generator")
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10573>
(cherry picked from commit fb7be7870c258e566f4da6b7d5d0218d717b82c5)
-
33d52db1
by Tapani Pälli
at 2021-05-18T23:02:27+02:00
anv: require rendering support for blit destination feature
This fixes some new cts tests that exercise blitting
between compressed and uncompressed formats.
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10830>
(cherry picked from commit 72fd126070ba749e10f7f58b1dfbb52198fb7eb9)
-
3838cc60
by Daniel Schürmann
at 2021-05-18T23:02:27+02:00
aco/ra: also prevent overflow register for p_create_vector operands
Fixes: d659ce0d6c5781a1230b182ef5ed1a77de485565 ('aco/ra: prevent underflow register for p_create_vector operands')
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10832>
(cherry picked from commit b960169257e42caca23c6e61c72bff7e53df123e)
-
cb7b9f08
by Rhys Perry
at 2021-05-18T23:02:27+02:00
aco/ra: initialize temp_in_scc earlier
We need to know if there's a temporary in SCC before the instruction, not
after.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 93c8ebfa780 ("aco: Initial commit of independent AMD compiler")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10459>
(cherry picked from commit 4e459df0fcb42cfb7223e15ffd7e20bcc9b16e75)
-
06f5c009
by Alyssa Rosenzweig
at 2021-05-18T23:02:27+02:00
panfrost: Don't clobber RT0 if RTn is disabled
Fixes: a124c47b9f9 ("panfrost: Fix NULL derefs in pan_cmdstream.c")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10393>
(cherry picked from commit dad599f15e2758ac05928fee6570dcbe255fc854)
-
d87dc12a
by Boris Brezillon
at 2021-05-18T23:02:27+02:00
panfrost: Relax the stride check when importing resources
Imported resources will not necessarily have their line stride aligned
on 64 bytes, and things prove to work just fine even on Bifrost, so
let's relax the condition and drop the comment stating that Bifrost
needs pixel lines to be aligned on 64 bytes.
Reported-by: Icecream95 <ixn@disroot.org>
Suggested-by: Icecream95 <ixn@disroot.org>
Fixes: 051d62cf0410 ("panfrost: Add a pan_image_layout_init() helper")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10423>
(cherry picked from commit 6b036d13502c8aff12b382af0bab5c7680ee24fd)
-
914f4e94
by Alyssa Rosenzweig
at 2021-05-18T23:02:27+02:00
panfrost: Fix major flaw in BO cache
BOs in the cache are chronological, so we try oldest BOs first. That
means if we find the oldest BO is busy, likely every BO is busy, and we
should bail early. This dramatically reduces the useless cycles spent in
bo_wait.
I studied the BO cache of the following drivers, all of which handle
this correctly: iris, lima, etnaviv, freedreno, vc4, v3d, v3dv.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10794>
(cherry picked from commit 77d04989135233c7b276bca3912ab07a12d9f362)
-
896b0203
by Dave Airlie
at 2021-05-18T23:34:13+02:00
llvmpipe: fix non-multisampled rendering to multisampled framebuffer
Don't depend moving between samples on key->multisample
Big CI wins
Reported-by: Erik Faye-Lund <kusmabite@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Fixes: 210d714f46e7 ("llvmpipe: handle multisample color stores.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10780>
(cherry picked from commit 172c719baf64294abcabd58543d8a0085584e476)
-
54bea47d
by Eric Engestrom
at 2021-05-18T23:34:13+02:00
.pick_status.json: Update to e17e3df476ec0f3f537f0169ccd5488f27802bf6
-
ce8b08b7
by Abel García Dorta
at 2021-05-18T23:34:13+02:00
i915g: fix implicit fallthrough
Closes: #4777
Fixes: 4e861ac4a1f ("i915g: Add more optimizations")
Fixes: f34fd58ec92 ("i915g: implement unfenced relocs for textures using tiling bits")
Fixes: beaf039f972 ("i915g: cleanup static state calculation, part 1")
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10811>
(cherry picked from commit 3e74bbf631f06aa8d58dc7a9aa87165521e6cef8)
-
154114bf
by Emma Anholt
at 2021-05-18T23:34:13+02:00
midgard: Fix type for vertex_builtin_arg() and compute_builtin_arg().
It takes an intrinsic, not an ALU op. Fixes a clang complaint about enum
conversion.
Fixes: 306800d747bc ("pan/midgard: Lower gl_VertexID/gl_InstanceID to attributes")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10843>
(cherry picked from commit 958f11d537334417af010b3d887a7dbacd0ca311)
-
899f030f
by Boris Brezillon
at 2021-05-18T23:34:13+02:00
panfrost: Fix format definitions to match gallium expectations
Gallium wants the depth or stencil component replicated on all .XYZW.
That's easily done on pre-v7 since we can forge all the swizzles we
want, but Bifrost v7 only supports a few combinations, so we have to
combine the user swizzle with our own 'replicate' swizzle to make it
work. Note that v7 has a trick to make border color work when the GRBA
order is chosen: they apply the red border color to the green component.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10612>
(cherry picked from commit f08c14138aeb13b7d3c9c73574c32c8ec1cf4edd)
-
f85a1f05
by Alyssa Rosenzweig
at 2021-05-18T23:34:13+02:00
nir/lower_fragcolor: Fix driver_location assignment
Fixes crash in
dEQP-GLES31.functional.shaders.framebuffer_fetch.basic.last_frag_data
when using this pass.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10411>
(cherry picked from commit 73eb497b86a319d7d2aff9178cb07dd6b9d65df7)
-
98fbae2c
by Eric Engestrom
at 2021-05-18T23:34:14+02:00
.pick_status.json: Update to 5be00fe88abb618454e1c448e6e61c8dea49c27f
-
db18d9c2
by Samuel Pitoiset
at 2021-05-18T23:34:14+02:00
nir/opt_access: fix getting variables in presence of similar bindings/desc
It's perfectly legal to declare multiple SSBOs that point to the same
binding/descriptor_set with different access mask. Currently, it will
always get the first one in the list that matches binding/desc_set
regardless of the access mask, but other variables might have different
access mask.
Fix this by being conservative if another variable uses the same
binding/desc_set because we can't get it reliably without adding
a new field to vulkan_resource_index.
This fixes rendering issues in Resident Evil Village with vkd3d-proton.
This bug has been uncovered by ("spirv: Don't remove variables used by
resource indexing intrinsics") because variables are no longer removed
No fossils-db changes.
Cc: 21.1 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10692>
(cherry picked from commit 1b1c726ca91dff781363b1b0980b47ca18f86a76)
-
66dc7dbb
by Maksim Sisov
at 2021-05-18T23:34:14+02:00
iris: export GEM handle with RDWR access rights
There is a regression that made it impossible to export gem
handles with write access.
That is, a client may export gem handles of each buffer plane, then
export dmabuf fds using these handles, and mmap these dmabuf in
a different process (this is what Chromium does).
After https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4861,
it became impossible as mmap resulted in EACCESS error as slightly
different approach was taken for exporting these gem handles.
This CL fixes exporting gem handles (which are exported from dmabuf
fds) by adding the DRM_RDWR flag.
Cc: mesa-stable
Fixes #3119
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10851>
(cherry picked from commit b74898ef699486d0513fcd3af2587a831df99dff)
-
4cdf191b
by Maksim Sisov
at 2021-05-18T23:34:14+02:00
i965: export GEM handle with RDWR access rights
There is a regression that made it impossible to export gem
handles with write access.
That is, a client may export gem handles of each buffer plane, then
export dmabuf fds using these handles, and mmap these dmabuf in
a different process (this is what Chromium does).
After https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4861,
it became impossible as mmap resulted in EACCESS error as slightly
different approach was taken for exporting these gem handles.
This CL fixes exporting gem handles (which are exported from dmabuf
fds) by adding the DRM_RDWR flag.
Cc: mesa-stable
Fixes #3119
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10850>
(cherry picked from commit 5eaf8b59c858bc93f0b18045f49dcdfe6b1d6e75)
-
b22b11ff
by Lucas Stach
at 2021-05-18T23:34:14+02:00
etnaviv: fix vertex sampler setup
The start offset of the vertex samplers isn't zero, but the indexing of
the passed in views array is still zero based. Use the correct indexing
variable to fix vertex sampler setup.
Cc: <mesa-stable@lists.freedesktop.org>
Fixes: 81ab9fe2d0c2 ("etnaviv: handle NULL views in set_sampler_views")
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10724>
(cherry picked from commit 92ed827fbdb4debedf2ed534daab4e3d8d8f6b9a)
-
16c4d735
by Bas Nieuwenhuizen
at 2021-05-18T23:34:14+02:00
radv: Use correct border swizzle on GFX9+.
We only need the format swizzle, not the full swizzle.
Fixes: 57e796a12a8 ("radv: Implement VK_EXT_custom_border_color")
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4020
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9731>
(cherry picked from commit 74d36c4f986c7bd38390d0803074e97057fd4a71)
-
ca191e12
by Icecream95
at 2021-05-19T11:49:51+02:00
panfrost: Make pan_select_crc_rt a non-static function
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10566>
(cherry picked from commit 1c58614ceec106b6b0e7b76c5f33bfe489a37c2f)
-
dd696cea
by Icecream95
at 2021-05-19T11:51:25+02:00
panfrost: Always write reloaded tiles when making CRC data valid
If CRC data is currently invalid and the current batch will make it
valid, write even clean tiles to make sure CRC data is updated.
Fixes: 8ba2f9f6985 ("panfrost: Create a blitter library to replace the existing preload helpers")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10566>
(cherry picked from commit e241ca6e9c6cefa8dae04501ecbef0783771aca9)
-
e0c130b6
by Eric Engestrom
at 2021-05-19T20:16:06+02:00
docs: add release notes for 21.1.1
-
abac12bc
by Eric Engestrom
at 2021-05-19T20:17:02+02:00
VERSION: bump for 21.1.1
-
a9163f9d
by Eric Engestrom
at 2021-05-19T22:25:17+02:00
.pick_status.json: Update to 17861aff9614abfea3b8a8f111a114b26b351915
-
1d357aa7
by Jose Fonseca
at 2021-05-19T22:25:22+02:00
draw: Allocate extra padding for extra shader outputs.
This prevents read buffer overflows in dup_vertex(), when draw stages
allocate extra shader outputs after the vertex buffers are allocated.
The original issue can be exercised with upcoming
piglit/tests/general/vertex-fallbacks.c test.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Cc: 21.0 21.1 <mesa-stable@lists.freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10836>
(cherry picked from commit 250605c57d8eb01c818cf639e412ca2f7cf4b00a)
-
88bd86ba
by Rhys Perry
at 2021-05-19T22:25:24+02:00
aco: disallow SGPRs on DPP instructions
They can't be encoded.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10841>
(cherry picked from commit 3013670dfda17565e689f402c5fc14806b3361ae)
-
49f846f5
by Jason Ekstrand
at 2021-05-19T22:25:25+02:00
anv: Plumb the shader into push constant helpers
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10571>
(cherry picked from commit 24b3e71fa9038972292e10d236b8c27ec2fcef4f)
-
29c18f3c
by Jason Ekstrand
at 2021-05-19T22:25:26+02:00
anv: Support pushing shader constants
Usually, nir_opt_constant_folding will get rid of any load_constant
intrinsics which might possibly be pushed but there are rare cases where
we can still end up with them. Better to handle them.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10571>
(cherry picked from commit c01354d5c4433452164e70a54e7bbfabf2443b50)
-
acb53b26
by Jason Ekstrand
at 2021-05-19T22:25:28+02:00
intel/vec4: Don't spill fp64 registers more than once
The way we handle spilling for fp64 in vec4 is to emit a series of MOVs
which swizzles the data around and then a pair of 32-bit spills. This
works great except that the next time we go to pick a spill reg, the
compiler isn't smart enough to figure out that the register has already
been spilled. Normally we do this by looking at the sources of spill
instructions (or destinations of fills) but, because it's separated from
the actual value by a MOV, we can't see it. This commit adds a new
opcode VEC4_OPCODE_MOV_FOR_SCRATCH which is identical to MOV in
semantics except that it lets RA know not to spill again.
Fixes: 82c69426a5a3 "i965/vec4: support basic spilling of 64-bit registers"
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10571>
(cherry picked from commit 2db88679432bd34a2c4ed761baec747192fa3e60)
-
f2638d60
by Timo Aaltonen
at 2021-05-24T11:59:04+03:00
Merge branch 'upstream-experimental' into debian-experimental
-
e6641001
by Timo Aaltonen
at 2021-05-24T11:59:38+03:00
bump the version
-
5eeedb6e
by Eric Engestrom
at 2021-05-25T10:09:35+02:00
pick-ui & .pick_status.json: rename `master_sha` to `main_sha`
I should've done that instead of the change I did in
b125ee559a3d733c2584 ("bin/pick: Rename master branch to main").
-
fadaaf31
by Eric Engestrom
at 2021-05-25T10:11:53+02:00
.pick_status.json: Update to b663c544177e9547793ee405887f0d41c50e6d1d
-
aba44786
by Eric Engestrom
at 2021-05-25T10:15:45+02:00
.pick_status.json: Update to 507e8907af913ab7b89211240568b8002b3475f1
-
fe5b1ad3
by Adam Jackson
at 2021-05-25T10:26:14+02:00
zink/ntv: Don't call free() on ralloc'd memory
Caught this with an LTO build:
[1465/1465] Linking target src/gallium/targets/dri/libgallium_dri.so
In function ‘spirv_shader_delete’,
inlined from ‘nir_to_spirv’ at ../src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c:3907:7:
../src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c:3916:4: warning: ‘free’ called on pointer ‘block_1394’ with nonzero offset 48 [-Wfree-nonheap-object]
3916 | FREE(s);
| ^
../src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c: In function ‘nir_to_spirv’:
../src/util/ralloc.c:133:18: note: returned from ‘malloc’
133 | void *block = malloc(align64(size + sizeof(ralloc_header),
| ^
Since s->words is allocated on the same ralloc context we can simplify
further by freeing the context all at once.
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10754>
(cherry picked from commit 584145ea882b710027ce620a5d505bd25ab284b1)
-
fd3dc855
by Alyssa Rosenzweig
at 2021-05-25T12:12:03+02:00
panfrost: Fix the reads_dest prototype
Takes too much state, only pass what we need.
Fixes: 93824b6451a ("panfrost: Move the blend logic out of the gallium driver")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
(cherry picked from commit a0592066b0c5408b6353c905d8f218c4cf54572a)
-
f60f062d
by Alyssa Rosenzweig
at 2021-05-25T12:12:05+02:00
panfrost: Fix is_opaque prototype
Fixes: 93824b6451a ("panfrost: Move the blend logic out of the gallium driver")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
(cherry picked from commit c35194b945cec0fb005d3f2ec417152f8acede5b)
-
65d5737f
by Ian Romanick
at 2021-05-31T22:48:16+02:00
nir/algebraic: Remove some optimizations of comparisons with fsat
When most of these patterns were created, we believed, incorrectly, that
fsat(NaN) was NaN. We have since realized that fsat(NaN) is zero.
Originally, this changed the patterns to use is_a_number. This didn't
help any shaders, so it's easier to just drop the optimizations.
This commit crossed paths with 4c3ad4d0658 ("nir/algebraic: mark more
optimization with fsat(NaN) as inexact") and bc123c396a9
("nir/algebraic: mark some optimizations with fsat(NaN) as inexact").
Given that these don't impact very many shaders, it seems safer to just
remove them.
As discussed in
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8716, I tried
modifying these patterns to use !(b cmp a). Unfortunately, on Intel
GPUs, the results were much worse than just removing the patterns
altogether.
Some other related patterns will be addressed in later commits.
There are still a number of patterns that use the identity fsat(1-X) ==
1 - fsat(X). If X is NaN, the former is zero while the latter is 1.0.
I haven't evaluted these patterns yet. If changes are needed in these
patterns, it should be a separate commit anyway.
v2: Replace arrow `=>` with `->` in comments because the `=>` looks a
lot like `<=` comparison. Suggested by Rhys.
Fixes: 92b75c126bb ("nir/algebraic: Replace checks that a value is between (or not) [0, 1]")
Fixes: a7f0c57673d ("nir/algebraic: Eliminate useless fsat() on operand of comparison w/value in (0, 1)")
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
All Intel hardware had similar results. (Ice Lake shown)
total instructions in shared programs: 20029060 -> 20029670 (<.01%)
instructions in affected programs: 69236 -> 69846 (0.88%)
helped: 0
HURT: 263
HURT stats (abs) min: 1 max: 20 x̄: 2.32 x̃: 1
HURT stats (rel) min: 0.30% max: 11.11% x̄: 1.35% x̃: 0.98%
95% mean confidence interval for instructions value: 1.86 2.78
95% mean confidence interval for instructions %-change: 1.18% 1.52%
Instructions are HURT.
total cycles in shared programs: 979821278 -> 979834425 (<.01%)
cycles in affected programs: 1476848 -> 1489995 (0.89%)
helped: 49
HURT: 204
helped stats (abs) min: 1 max: 812 x̄: 102.31 x̃: 20
helped stats (rel) min: 0.01% max: 21.43% x̄: 2.23% x̃: 0.52%
HURT stats (abs) min: 2 max: 2600 x̄: 89.02 x̃: 16
HURT stats (rel) min: 0.04% max: 27.27% x̄: 1.49% x̃: 0.72%
95% mean confidence interval for cycles value: 13.18 90.75
95% mean confidence interval for cycles %-change: 0.29% 1.25%
Cycles are HURT.
No fossil-db changes.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10012>
(cherry picked from commit d69ba58644d1f34ca525f283a80f78fc371abc81)
-
29874d55
by Ian Romanick
at 2021-05-31T22:48:16+02:00
nir/algebraic: Invert comparisons less often
This fixes the piglit test range_analysis_fsat_of_nan.shader_test. That
test contains some code like
o = saturate(X) > 0 ? vec4(1.0, 0.0, 0.0, 1.0)
: vec4(0.0, 1.0, 0.0, 1.0);
A clever optimizer will convert this to
o = vec4(float(saturate(X) > 0),
float(!(saturate(X) > 0)),
0, 1);
Due to the ordering of optimizations in the compiler, the `saturate`
operations are removed. This is safe even in the presense of NaN.
o = vec4(float(X > 0), float(!(X > 0)), 0, 1);
Since the calculations are not marked precise, an overzealous
optimizer may reduce this to
o = vec4(float(X > 0), float(X <= 0), 0, 1);
This will result in black being output. The GLSL spec gives quite a bit
of leeway with respect to NaN, but that seems too far. The shader
author asked for a result of red or green. A result of black is still
"undefined behavior," but it's also a little mean.
This also enables CSE to do its job better.
v2: Update A530 expected image checksum for minetest.trace.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4531
Fixes: 0dbda153aae ("nir/algebraic: Flag inexact optimizations")
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Tiger Lake
total instructions in shared programs: 21041563 -> 21041789 (<.01%)
instructions in affected programs: 992066 -> 992292 (0.02%)
helped: 526
HURT: 548
helped stats (abs) min: 1 max: 16 x̄: 2.48 x̃: 2
helped stats (rel) min: 0.04% max: 5.56% x̄: 0.74% x̃: 0.49%
HURT stats (abs) min: 1 max: 27 x̄: 2.80 x̃: 2
HURT stats (rel) min: 0.04% max: 4.55% x̄: 0.59% x̃: 0.38%
95% mean confidence interval for instructions value: -0.00 0.42
95% mean confidence interval for instructions %-change: -0.12% <.01%
Inconclusive result (value mean confidence interval includes 0).
total cycles in shared programs: 855885569 -> 856118189 (0.03%)
cycles in affected programs: 343637248 -> 343869868 (0.07%)
helped: 907
HURT: 541
helped stats (abs) min: 1 max: 7724 x̄: 206.45 x̃: 36
helped stats (rel) min: <.01% max: 29.97% x̄: 1.01% x̃: 0.37%
HURT stats (abs) min: 1 max: 14177 x̄: 776.09 x̃: 31
HURT stats (rel) min: <.01% max: 29.94% x̄: 1.24% x̃: 0.35%
95% mean confidence interval for cycles value: 84.30 237.00
95% mean confidence interval for cycles %-change: -0.32% -0.01%
Inconclusive result (value mean confidence interval and %-change mean confidence interval disagree).
LOST: 3
GAINED: 5
Ice Lake
total instructions in shared programs: 20027107 -> 20025352 (<.01%)
instructions in affected programs: 1068856 -> 1067101 (-0.16%)
helped: 1153
HURT: 273
helped stats (abs) min: 1 max: 14 x̄: 1.83 x̃: 1
helped stats (rel) min: 0.03% max: 5.66% x̄: 0.61% x̃: 0.35%
HURT stats (abs) min: 1 max: 15 x̄: 1.29 x̃: 1
HURT stats (rel) min: 0.16% max: 1.30% x̄: 0.58% x̃: 0.60%
95% mean confidence interval for instructions value: -1.33 -1.13
95% mean confidence interval for instructions %-change: -0.43% -0.34%
Instructions are helped.
total cycles in shared programs: 979499227 -> 979448725 (<.01%)
cycles in affected programs: 344261539 -> 344211037 (-0.01%)
helped: 1079
HURT: 441
helped stats (abs) min: 1 max: 9384 x̄: 147.78 x̃: 48
helped stats (rel) min: <.01% max: 31.83% x̄: 0.90% x̃: 0.33%
HURT stats (abs) min: 1 max: 7220 x̄: 247.07 x̃: 32
HURT stats (rel) min: <.01% max: 31.30% x̄: 1.52% x̃: 0.53%
95% mean confidence interval for cycles value: -70.01 3.56
95% mean confidence interval for cycles %-change: -0.35% -0.05%
Inconclusive result (value mean confidence interval includes 0).
total spills in shared programs: 10564 -> 10568 (0.04%)
spills in affected programs: 143 -> 147 (2.80%)
helped: 0
HURT: 1
total fills in shared programs: 11343 -> 11347 (0.04%)
fills in affected programs: 287 -> 291 (1.39%)
helped: 0
HURT: 1
LOST: 3
GAINED: 2
Skylake
total instructions in shared programs: 18192274 -> 18190128 (-0.01%)
instructions in affected programs: 1000188 -> 998042 (-0.21%)
helped: 1149
HURT: 55
helped stats (abs) min: 1 max: 14 x̄: 1.92 x̃: 1
helped stats (rel) min: 0.04% max: 6.67% x̄: 0.67% x̃: 0.42%
HURT stats (abs) min: 1 max: 2 x̄: 1.05 x̃: 1
HURT stats (rel) min: 0.16% max: 0.55% x̄: 0.27% x̃: 0.26%
95% mean confidence interval for instructions value: -1.87 -1.69
95% mean confidence interval for instructions %-change: -0.67% -0.58%
Instructions are helped.
total cycles in shared programs: 960856054 -> 960728040 (-0.01%)
cycles in affected programs: 340840968 -> 340712954 (-0.04%)
helped: 1079
HURT: 233
helped stats (abs) min: 1 max: 7640 x̄: 170.95 x̃: 46
helped stats (rel) min: <.01% max: 30.20% x̄: 0.96% x̃: 0.28%
HURT stats (abs) min: 1 max: 6864 x̄: 242.23 x̃: 26
HURT stats (rel) min: <.01% max: 34.64% x̄: 2.10% x̃: 0.22%
95% mean confidence interval for cycles value: -135.62 -59.53
95% mean confidence interval for cycles %-change: -0.59% -0.25%
Cycles are helped.
LOST: 15
GAINED: 1
Broadwell
total instructions in shared programs: 17855624 -> 17853580 (-0.01%)
instructions in affected programs: 1012209 -> 1010165 (-0.20%)
helped: 1105
HURT: 52
helped stats (abs) min: 1 max: 13 x̄: 1.90 x̃: 1
helped stats (rel) min: 0.03% max: 6.67% x̄: 0.67% x̃: 0.36%
HURT stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel) min: 0.13% max: 0.52% x̄: 0.26% x̃: 0.25%
95% mean confidence interval for instructions value: -1.86 -1.67
95% mean confidence interval for instructions %-change: -0.68% -0.58%
Instructions are helped.
total cycles in shared programs: 1029905447 -> 1029840699 (<.01%)
cycles in affected programs: 347102680 -> 347037932 (-0.02%)
helped: 1007
HURT: 211
helped stats (abs) min: 1 max: 1360 x̄: 89.76 x̃: 48
helped stats (rel) min: <.01% max: 16.26% x̄: 0.69% x̃: 0.25%
HURT stats (abs) min: 1 max: 1297 x̄: 121.51 x̃: 20
HURT stats (rel) min: <.01% max: 31.31% x̄: 1.21% x̃: 0.20%
95% mean confidence interval for cycles value: -62.39 -43.92
95% mean confidence interval for cycles %-change: -0.47% -0.25%
Cycles are helped.
total spills in shared programs: 20335 -> 20333 (<.01%)
spills in affected programs: 19 -> 17 (-10.53%)
helped: 2
HURT: 0
total fills in shared programs: 25905 -> 25899 (-0.02%)
fills in affected programs: 23 -> 17 (-26.09%)
helped: 2
HURT: 0
LOST: 9
GAINED: 0
Haswell
total instructions in shared programs: 16418516 -> 16417293 (<.01%)
instructions in affected programs: 223785 -> 222562 (-0.55%)
helped: 590
HURT: 67
helped stats (abs) min: 1 max: 15 x̄: 2.19 x̃: 1
helped stats (rel) min: 0.03% max: 6.52% x̄: 0.87% x̃: 0.60%
HURT stats (abs) min: 1 max: 2 x̄: 1.04 x̃: 1
HURT stats (rel) min: 0.04% max: 1.85% x̄: 0.44% x̃: 0.25%
95% mean confidence interval for instructions value: -2.01 -1.71
95% mean confidence interval for instructions %-change: -0.80% -0.67%
Instructions are helped.
total cycles in shared programs: 1037179754 -> 1037084874 (<.01%)
cycles in affected programs: 352541071 -> 352446191 (-0.03%)
helped: 1093
HURT: 182
helped stats (abs) min: 1 max: 888 x̄: 111.03 x̃: 64
helped stats (rel) min: <.01% max: 27.30% x̄: 0.84% x̃: 0.20%
HURT stats (abs) min: 1 max: 6777 x̄: 145.49 x̃: 21
HURT stats (rel) min: <.01% max: 24.10% x̄: 1.99% x̃: 0.29%
95% mean confidence interval for cycles value: -88.10 -60.73
95% mean confidence interval for cycles %-change: -0.58% -0.29%
Cycles are helped.
total spills in shared programs: 17457 -> 17456 (<.01%)
spills in affected programs: 12 -> 11 (-8.33%)
helped: 1
HURT: 0
total fills in shared programs: 20387 -> 20385 (<.01%)
fills in affected programs: 15 -> 13 (-13.33%)
helped: 1
HURT: 0
LOST: 6
GAINED: 1
Ivy Bridge and earlier platforms had similar results. (Ivy Bridge shown)
total instructions in shared programs: 15515482 -> 15513998 (<.01%)
instructions in affected programs: 239739 -> 238255 (-0.62%)
helped: 573
HURT: 57
helped stats (abs) min: 1 max: 20 x̄: 2.73 x̃: 2
helped stats (rel) min: 0.03% max: 9.84% x̄: 0.94% x̃: 0.55%
HURT stats (abs) min: 1 max: 2 x̄: 1.39 x̃: 1
HURT stats (rel) min: 0.09% max: 1.85% x̄: 0.52% x̃: 0.35%
95% mean confidence interval for instructions value: -2.57 -2.14
95% mean confidence interval for instructions %-change: -0.89% -0.73%
Instructions are helped.
total cycles in shared programs: 584509880 -> 584463152 (<.01%)
cycles in affected programs: 11765280 -> 11718552 (-0.40%)
helped: 661
HURT: 152
helped stats (abs) min: 1 max: 3073 x̄: 101.99 x̃: 32
helped stats (rel) min: <.01% max: 34.38% x̄: 1.46% x̃: 0.50%
HURT stats (abs) min: 1 max: 6637 x̄: 136.10 x̃: 15
HURT stats (rel) min: <.01% max: 24.19% x̄: 1.75% x̃: 0.25%
95% mean confidence interval for cycles value: -82.79 -32.16
95% mean confidence interval for cycles %-change: -1.11% -0.61%
Cycles are helped.
LOST: 9
GAINED: 0
Tiger Lake
Instructions in all programs: 160905127 -> 160900949 (-0.0%)
SENDs in all programs: 6812418 -> 6812085 (-0.0%)
Loops in all programs: 38225 -> 38225 (+0.0%)
Cycles in all programs: 7431911114 -> 7433914697 (+0.0%)
Spills in all programs: 192582 -> 192582 (+0.0%)
Fills in all programs: 304539 -> 304537 (-0.0%)
Ice Lake
Instructions in all programs: 145296733 -> 145292370 (-0.0%)
SENDs in all programs: 6863818 -> 6863485 (-0.0%)
Loops in all programs: 38219 -> 38219 (+0.0%)
Cycles in all programs: 8798257570 -> 8800204360 (+0.0%)
Spills in all programs: 216880 -> 216880 (+0.0%)
Fills in all programs: 334250 -> 334248 (-0.0%)
Skylake
Instructions in all programs: 135891485 -> 135887357 (-0.0%)
SENDs in all programs: 6803031 -> 6802698 (-0.0%)
Loops in all programs: 38216 -> 38216 (+0.0%)
Cycles in all programs: 8442221881 -> 8444201959 (+0.0%)
Spills in all programs: 194839 -> 194839 (+0.0%)
Fills in all programs: 301116 -> 301114 (-0.0%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10012>
(cherry picked from commit 4246c2869c3c5fe3b08e6b1a7996186d040dda4a)
-
f6153945
by Samuel Pitoiset
at 2021-05-31T22:48:16+02:00
aco: fix derivatives/intrinsics with SGPR sources
ds_swizzle_b32 requires a VGPR and DPP can't encode SGPR sources.
Fixes
dEQP-VK.graphicsfuzz.cov-derivative-uniform-vector-global-loop-count.
Cc: 21.1 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10840>
(cherry picked from commit fe2a5716ee7f99564690dc7eabbc5ada39d1d187)
-
3c81c319
by Georg Lehmann
at 2021-05-31T22:48:16+02:00
radv: Fix compatible image handle type for dmabufs.
Reviewed-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Fixes: 6c83e3ea98b7 ("radv: Add format modifier format queries.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10891>
(cherry picked from commit 36d0ff46822c9983ec60015f575820c4acc88017)
-
e762fe00
by Emma Anholt
at 2021-05-31T22:48:16+02:00
i915g: Disable 3D-pipeline clears.
The 3D-pipeline fast clears try to emit FS constants before an FS is
necessarily bound, causing segfaults in dEQP. Plus it flushes the whole
batchbuffer so it'll probably be slower anyway.
Fixes: 6358e6371b31 ("i915g: implement hw clear")
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10874>
(cherry picked from commit 8509aceb7449c6ae0bbc3d35c13a05b62fd48bc1)
-
caf92e80
by Emma Anholt
at 2021-05-31T22:48:16+02:00
i915g: Add support for the .Absolute flag on TGSI srcs.
We don't have a way to ask TGSI to not have .Absolute, so lower it in the
backend.
Cc: mesa-stable
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10874>
(cherry picked from commit 15f608582ec04420213195a0069ca9d83fcd2463)
-
ee7e0221
by Eric Anholt
at 2021-05-31T22:48:16+02:00
i915g: Stop advertising support for indirect addressing in the FS.
This hardware can't do any form of indirect addressing. The couple of new
Crashes are the backend falling over when faced with loops/ifs.
Fixes: 8a22064d316e ("i915g: Implement vertex textures.")
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10874>
(cherry picked from commit 8b0901c70705c1b5f47b17f8c8a7c1150c293362)
-
bbb42ffc
by Kenneth Graunke
at 2021-05-31T22:48:16+02:00
i965: Don't advertise Y-tiled modifiers for scanout buffers on Gfx8-
According to isl_gfx7.c:264, the display engine does not support Y
tiled buffers prior to Skylake. But we exposed I915_FORMAT_MOD_Y_TILED
even when querying for a list of modifiers with __DRI_IMAGE_USE_SCANOUT
set, which we can't support. That led to crashes later when we tried
to create such an image, and isl rightly denied it.
This duplicates a bit of code from ISL, but the isl_gfx6_filter_tiling
function that we ought to use to filter things relies on surf_info,
which we don't have at this stage. This is probably good enough.
Fixes crashes in wflinfo since c03e79d7831f, but the bug exists before
that and it's probably worth a stable backport even without that patch.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4815
Fixes: c03e79d7831 ("loader/dri: hook up createImageWithModifiers2")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10907>
(cherry picked from commit e9e953ff943475806079d949b37974ce7e63c556)
-
71e14df4
by Kenneth Graunke
at 2021-05-31T22:48:16+02:00
iris: Don't advertise Y-tiled modifiers for scanout buffers on Gfx8
According to isl_gfx7.c:264, the display engine does not support Y
tiled buffers prior to Skylake. But we exposed I915_FORMAT_MOD_Y_TILED
even when querying for a list of modifiers with PIPE_BIND_SCANOUT set,
which we can't support. That led to crashes later when we tried to
create such an image, and isl rightly denied it.
Fixes crashes in wflinfo since c03e79d7831f, but the bug exists before
that and it's probably worth a stable backport even without that patch.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4815
Fixes: c03e79d7831 ("loader/dri: hook up createImageWithModifiers2")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10907>
(cherry picked from commit dd508b2bed30901e9dcdd8abb271b5bc28574264)
-
a0cfc718
by Mike Blumenkrantz
at 2021-05-31T22:48:16+02:00
util/prim_restart: fix util_translate_prim_restart_ib
this was broken for the indirect case if the indirect draw count or
firstIndex was nonzero and also would rewrite the index buffer onto the
wrong offset of the dst buffer
Fixes: 0c85d6c523f ("gallium/util: factor out primitive-restart rewriting logic")
Fixes: 330d0607ed6 ("gallium: remove pipe_index_buffer and set_index_buffer")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10909>
(cherry picked from commit 1272c2e05246cad647324ffdccf56435b97dec1c)
-
0a413944
by SureshGuttula
at 2021-05-31T22:48:16+02:00
frontends/va/picture:Fix wrong reallocation even surface is protected
This patch will avoid reallocation,if surface is already protected.
Fixing the comparision logic of boolean value(true \ flase) with
PIPE_BIND_PROTECTED.
Fixes: 81be8b3c2f2 ("va/picture: make sure destination buffer is protected if needed")
Signed-off-by: SureshGuttula <suresh.guttula@amd.corp-partner.google.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10916>
(cherry picked from commit 0236b8a5de9aaffc8bc442a583672453fbc24df4)
-
6e2514cd
by Juan A. Suarez Romero
at 2021-05-31T22:48:17+02:00
vc4: initialize array
This fixes a (rather false) error about accessing an array that it is
uninitialized.
Fixes: 7bc39c8418e ("vc4: Add a dump-the-surface-contents routine.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4816
Cc: mesa-stable
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10918>
(cherry picked from commit 7e767ffeb36a7a1de22a73eebca8d7c10034313d)
-
08aca803
by Mike Blumenkrantz
at 2021-05-31T22:48:17+02:00
aux/vbuf: prevent uint underflow and assert if no vbs are dirty
if this mask is 0, there is nothing to do here
Fixes: e73bf3b805d ("gallium: add start_slot parameter to set_vertex_buffers")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10929>
(cherry picked from commit 43abed919e21fdca7bf228b573fc25e92a9944e1)
-
3bb1a795
by Robert Tarasov
at 2021-05-31T22:48:17+02:00
iris: Check data alignment for copy_mem_mem
Check both source and destination offsets are aligned to 4. This
patch fixes dEQP-GLES{2|3}.functional.buffer.write.random.* tests
failures on guest side while trying to copy small (<16b) buffers
via glBufferSubData() with offset which isn't aligned to 4.
Fixes: 9b1b9714 ("iris: Use MI_COPY_MEM_MEM for tiny resource_copy_region calls.")
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Lionel Landwerlin lionel.g.landwerlin@intel.com
Reviewed-by: Marcin Ślusarz marcin.slusarz@intel.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10910>
(cherry picked from commit a04d0a304ab9d7f84bd21643cd93584d1dc23adc)
-
28429917
by Mike Blumenkrantz
at 2021-05-31T22:48:17+02:00
aux/trace: fix set_inlinable_constants hook
need to dump the arg, not just the array
Fixes: 8926c4a313e ("aux/trace: add a set_inlinable_constants hook")
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10899>
(cherry picked from commit dce827f69c6163c6390f3d561024356d8a50d16e)
-
90c441ec
by Samuel Pitoiset
at 2021-05-31T22:48:17+02:00
radv: fix fast clearing DCC if one level can't be compressed on GFX10+
Fallback to a slow clear, this could be improved by splitting the
clear into two parts (one fast and one slow) but that's complicated.
Cc: 21.1 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10516>
(cherry picked from commit e98c61e9f33d3ab8d07f950af3f248554ac2d835)
-
c0c43709
by Icecream95
at 2021-05-31T22:48:17+02:00
panfrost: Fix polygon list size computations
As noted in f5c293425fa ("panfrost: Correct polygon size computations"),
"We do have to be careful to add the header size to total comptued BO
size."
Fixes: ff3eada7eb4 ("panfrost: Use the generic preload and FB helpers in the gallium driver")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4660
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4737
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10943>
(cherry picked from commit fe9d37b0c6e89f11a5f25022a851da81d19dab73)
-
f7e7bea4
by Italo Nicola
at 2021-05-31T22:48:17+02:00
panfrost: fix GL_EXT_multisampled_render_to_texture regression
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Fixes: ff3eada7eb4 ("panfrost: Use the generic preload and FB helpers in the gallium driver")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10962>
(cherry picked from commit c746747cb82f10fb5f1f3b625e5833d8d2c1e042)
-
a22ff198
by Eric Engestrom
at 2021-05-31T22:48:17+02:00
.pick_status.json: Update to 3179daf61393ee8a0fac943b94335b114e34873b
-
a12b11ef
by Alyssa Rosenzweig
at 2021-05-31T22:48:17+02:00
panfrost: Increase tiler_heap max allocation to 64MB
We previously allocated only 16MB, but this isn't always enough. Now
that we have growable (heap) on recent kernels, there's not much reason
to try to shrink this allocation.
Fixes OUT_OF_MEMORY fault on furmark trace.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10938>
(cherry picked from commit ac1ee2bebe19f7d2264325a182b6e84df5db1d16)
-
ec77157d
by Marek Olšák
at 2021-05-31T22:48:17+02:00
ac/gpu_info: set has_zero_index_buffer_bug for Navi12 too
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Cc: mesa-stable@lists.freedesktop.org
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
(cherry picked from commit 38d3c4251d3fe69667727fcbd11d5fc200ce0fec)
-
ba88b06a
by Marek Olšák
at 2021-05-31T22:48:17+02:00
radeonsi: add a gfx10 hw bug workaround with the barrier before gs_alloc_req
Fixes: 8845a23698c - amd: add NAVI10 PCI IDs
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
(cherry picked from commit 64b75cc12e09dcdafbe205cbf355cd8dfbc7a660)
-
ed48415d
by Marek Olšák
at 2021-05-31T22:48:17+02:00
radeonsi: disable DFSM on gfx9 by default because it decreases performance a lot
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
(cherry picked from commit 56a450e984226640391a8bdef29e16be38fd75cf)
-
fbc0a0b3
by Nanley Chery
at 2021-05-31T22:48:17+02:00
anv,iris: Port the D16 workaround stalls to BLORP
Commit cd40110420b added stalls before register writes that occur when
drivers emit depth stencil packets. However, it only did so for
non-BLORP draw calls. Since those packets are sometimes emitted during
BLORP calls, add stalls there too.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4574
Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10939>
(cherry picked from commit 34dbbfdd14e5d9501c9a83b52d869cf8b3234f44)
-
8bb7b888
by Nanley Chery
at 2021-05-31T22:48:17+02:00
intel/isl: Fix HiZ+CCS comment about ambiguates
Note that CCS isn't ambiguated during a HiZ ambiguate. Dumping the CCS
surface after a HiZ ambiguate shows that the CCS is unchanged.
Fixes: 98dc7f56b7d ("intel/isl: Add a separate ISL_AUX_USAGE_HIZ_CCS_WT")
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9112>
(cherry picked from commit 19a8bd4c6320e1fefa060e96738835beb24d3209)
-
be1dcc87
by Samuel Pitoiset
at 2021-05-31T22:48:17+02:00
aco: fix emitting discard when the program just ends
For fragment shaders that only contain a discard, the exec mask has
to be zero'd and everything discarded.
It seems unnecessary to emit an export here because if the FS has no
exports, the compiler already emits a null export at the end.
Fixes incorrect hair rendering in Detroit: Become Human.
fossil-db (Sienna Cichlid):
Totals from 3 (0.00% of 149839) affected shaders:
CodeSize: 2896 -> 2872 (-0.83%)
Instrs: 556 -> 553 (-0.54%)
Latency: 29266 -> 29214 (-0.18%)
InvThroughput: 3374 -> 3372 (-0.06%)
Cc: 21.1 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10955>
(cherry picked from commit 729ebe4b17f0905f87f41c0ffe004e042f3c55f6)
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77c7f65e
by Rhys Perry
at 2021-05-31T22:48:17+02:00
radv: add radv_absolute_depth_bias
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10980>
(cherry picked from commit 665f11e82939dc8937955f53157b15405a46378a)
-
134d32a2
by Rhys Perry
at 2021-05-31T22:48:18+02:00
radv: workaround incorrect depthBiasConstantFactor by Path of Exile
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4677
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10980>
(cherry picked from commit 4e4dd4f842929b891e4194e9678d365f08647a87)
-
7ce1dcb5
by Mike Blumenkrantz
at 2021-05-31T22:48:18+02:00
zink: remove weird lod hack for texturing
this breaks texturing in non-fragment stages and is unnecessary
due to using nir_lower_tex
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11007>
(cherry picked from commit a9d3b0050251821d3c2571fa310fc8030a7e9e72)
-
3cda0c35
by Anuj Phogat
at 2021-05-31T22:48:18+02:00
intel/gfx12+: Add Wa_14013840143
Cc: mesa-stable
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10984>
(cherry picked from commit 6bb66b78a9b252cd344c9c4fd78260f59bbd7b7a)
-
5b469639
by cheyang
at 2021-05-31T22:48:18+02:00
virgl:Fix the leak of hw_res used as fence
Fence destroy hw_res not dec reference.Lead leak.
Call virgl_drm_resource_reference() to release hw_res
instead of calling virgl_hw_res_destroy() directly.
Fixes: c54fb6ef3d8 ("virgl: Don't destroy resource while it's in use.")
Signed-off-by: cheyang <cheyang@bytedance.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lepton Wu <lepton@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11008>
(cherry picked from commit 4a3c715bb4654ae2c8b61bfb8af8dadde60d675a)
-
96a12c97
by Eric Engestrom
at 2021-05-31T22:48:18+02:00
.pick_status.json: Update to 761383720617b46617bd278ec6015c9520f43f5c
-
70aa6c66
by Erik Faye-Lund
at 2021-05-31T22:48:18+02:00
zink: use actual const for const offset
When we emit constants, we don't know what type they'll be used as, so
we just emit them as uint, and then bitcast them to whatever we need.
But this isn't a good idea for ConstOffset, which needs to actually be a
const value, and not a const value bitcasted. So we sadly have to
open-code the const emitting here to avoid the problem.
Fixes: e963d35efe1 ("zink: use ConstOffset for nir_tex_src_offset")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4831
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11032>
(cherry picked from commit 761383720617b46617bd278ec6015c9520f43f5c)
-
de318a58
by Eric Engestrom
at 2021-05-31T22:48:18+02:00
.pick_status.json: Update to 1199d86b2cccc38a101e63bdf9b60a7391f96092
-
fda533a4
by Neha Bhende
at 2021-05-31T22:48:18+02:00
svga: Add target and sampler_return_type info into shader key
Fixes: 584b1070372a0e ("st/mesa: Drop the TGSI paths for drawpixels and use nir-to-tgsi")
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11011>
(cherry picked from commit 4b958ac7200d200d46d4b33c03182d8bab641eef)
-
7d95e4f4
by Neha Bhende
at 2021-05-31T22:48:18+02:00
svga: Use shader_key info to declare resources if TGSI shader is missing it
Sometimes, TGSI shader doesn't have SVIEW declaration if it is not
utilize in shader. In such cases, declare those resources with the
help of information stored in shader key.
Fixes: 584b1070372a0e ("st/mesa: Drop the TGSI paths for drawpixels and use nir-to-tgsi")
Tested with piglit, gleretrace
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11011>
(cherry picked from commit fd986490917434fec94d67f8a995eba176c82b26)
-
524341f1
by Charmaine Lee
at 2021-05-31T22:48:18+02:00
svga: fix texture rectangle sampling when no sampler view declaration is defined
It is valid to not have a sampler view declaration for the corresponding
sampler in a TGSI shader, and hence we should not rely on the sampler view
declaration to determine if we need to adjust the unnormalized coordinates
for texture rectangle sampling.
This patch is to prep for tgsi shaders that are translated from nir which
in many cases do not issue sampler view declarations.
Fixes: 584b1070372a0e ("st/mesa: Drop the TGSI paths for drawpixels and use nir-to-tgsi")
Reviewed-by: Neha Bhende <bhenden@vmware.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11011>
(cherry picked from commit fda4eaf5c43dc05b1218a394a7e418054347a6d5)
-
c53194d8
by Erik Faye-Lund
at 2021-05-31T22:48:18+02:00
util/prim_restart: revert part of bad fix
When drawing using util_translate_prim_restart_ib, zink explicitly
ignores pipe_draw_start_count_bias::start, because
util_translate_prim_restart_ib used to create a new index-buffer without
padding at the start.
This makes a lot of sense, because creating a padded index buffer is
just wasteful.
So let's walk back on the choice of starting to pad the output buffer.
Fixes: 1272c2e0524 ("util/prim_restart: fix util_translate_prim_restart_ib")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4851
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11059>
(cherry picked from commit 05bb449610fd2d0a96cbb18c70923cabdb15bb36)
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b84b2bcd
by Samuel Pitoiset
at 2021-05-31T22:48:18+02:00
radv: enable RADV_DEBUG=invariantgeom for Monster Hunter World
DXVK 1.8.1 marks position as always invariant but the DX12 version
of the game has the same issue and it's not yet fixed on the
vkd3d-proton side.
Fixes some Z-fighting on GFX10.3.
Cc: 21.1 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11029>
(cherry picked from commit 816be7d46fc29c31d94747de2928733f69758618)
-
b7be28b0
by Erik Kurzinger
at 2021-06-02T20:08:40+02:00
vulkan/device_select: avoid segfault on Wayland if wl_drm is unavailable
On Wayland, if the wl_drm interface is not available, for example if the
compositor is using the proprietary NVIDIA driver along with their egl-wayland
library, the device_select layer will fail to initialize. However, the failure
path will unconditionally call wl_drm_destroy even though info.wl_drm would be
NULL in that case. This can cause a segfault in libwayland-client.so.
To fix this, check if info.wl_drm is NULL before calling wl_drm_destroy. This
way, initialization will fail gracefully even if that interface is not present.
Signed-off-by: Erik Kurzinger <ekurzinger@nvidia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10598>
(cherry picked from commit f4eb13dc55446794c4449386fa7f838ed061ce19)
-
1a75caf7
by Eric Engestrom
at 2021-06-02T21:00:20+02:00
docs: add release notes for 21.1.2
-
3e59d54d
by Eric Engestrom
at 2021-06-02T21:02:51+02:00
VERSION: bump for 21.1.2
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35624ec0
by Timo Aaltonen
at 2021-06-07T14:01:21+03:00
Merge branch 'upstream-experimental' into debian-experimental
-
3df8bbf5
by Timo Aaltonen
at 2021-06-07T14:02:12+03:00
bump the version
-
a8df8447
by Timo Aaltonen
at 2021-06-18T13:45:20+03:00
iris-avoid-abort-if-enomem.diff: Don't abort when out of memory. (LP: #1918855)
-
16da9d2a
by Timo Aaltonen
at 2021-06-18T15:32:52+03:00
release to experimental